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Cyclone V
HPS Register Address Map and Definitions
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Register Address Map for
Cyclone V
HPS
HPS
FPGA Slaves Accessed Via HPS2FPGA AXI Bridge (hps2fpgaslaves) Address Map
System Trace Macrocell (STM) Module Address Map
Debug Access Port (DAP) Module Address Map
FPGA Slaves Accessed Via Lightweight HPS2FPGA AXI Bridge (lwfpgaslaves) Address Map
LWHPS2FPGA AXI Bridge Module Address Map
LWHPS2FPGA AXI Bridge Module Summary
ID Register Group Register Descriptions
periph_id_4
periph_id_0
periph_id_1
periph_id_2
periph_id_3
comp_id_0
comp_id_1
comp_id_2
comp_id_3
Master Register Group Register Descriptions
FPGA2HPS AXI Bridge Registers Register Descriptions
fn_mod_bm_iss
ahb_cntl
HPS2FPGA AXI Bridge Registers Register Descriptions
fn_mod_bm_iss
ahb_cntl
32-bit Master Register Descriptions
fn_mod_bm_iss
wr_tidemark
fn_mod
Slave Register Group Register Descriptions
L3 Slave Register Group Register Descriptions
fn_mod
HPS2FPGA AXI Bridge Module Address Map
HPS2FPGA AXI Bridge Module Summary
ID Register Group Register Descriptions
periph_id_4
periph_id_0
periph_id_1
periph_id_2
periph_id_3
comp_id_0
comp_id_1
comp_id_2
comp_id_3
Master Register Group Register Descriptions
32-bit Master Register Descriptions
fn_mod2
fn_mod
128-bit Master Register Descriptions
fn_mod2
fn_mod
FPGA2HPS AXI Bridge Module Address Map
FPGA2HPS AXI Bridge Module Summary
ID Register Group Register Descriptions
periph_id_4
periph_id_0
periph_id_1
periph_id_2
periph_id_3
comp_id_0
comp_id_1
comp_id_2
comp_id_3
Slave Register Group Register Descriptions
32-bit Slave Register Descriptions
fn_mod2
fn_mod
128-bit Slave Register Descriptions
fn_mod2
fn_mod
EMAC Module Address Map
EMAC Module Summary
GMAC Register Group Register Descriptions
MAC_Configuration
MAC_Frame_Filter
GMII_Address
GMII_Data
Flow_Control
VLAN_Tag
Version
Debug
LPI_Control_Status
LPI_Timers_Control
Interrupt_Status
Interrupt_Mask
MAC_Address0_High
MAC_Address0_Low
MAC_Address1_High
MAC_Address1_Low
MAC_Address2_High
MAC_Address2_Low
MAC_Address3_High
MAC_Address3_Low
MAC_Address4_High
MAC_Address4_Low
MAC_Address5_High
MAC_Address5_Low
MAC_Address6_High
MAC_Address6_Low
MAC_Address7_High
MAC_Address7_Low
MAC_Address8_High
MAC_Address8_Low
MAC_Address9_High
MAC_Address9_Low
MAC_Address10_High
MAC_Address10_Low
MAC_Address11_High
MAC_Address11_Low
MAC_Address12_High
MAC_Address12_Low
MAC_Address13_High
MAC_Address13_Low
MAC_Address14_High
MAC_Address14_Low
MAC_Address15_High
MAC_Address15_Low
SGMII_RGMII_SMII_Control_Status
MMC_Control
MMC_Receive_Interrupt
MMC_Transmit_Interrupt
MMC_Receive_Interrupt_Mask
MMC_Transmit_Interrupt_Mask
txoctetcount_gb
txframecount_gb
txbroadcastframes_g
txmulticastframes_g
tx64octets_gb
tx65to127octets_gb
tx128to255octets_gb
tx256to511octets_gb
tx512to1023octets_gb
tx1024tomaxoctets_gb
txunicastframes_gb
txmulticastframes_gb
txbroadcastframes_gb
txunderflowerror
txsinglecol_g
txmulticol_g
txdeferred
txlatecol
txexesscol
txcarriererr
txoctetcnt
txframecount_g
txexcessdef
txpauseframes
txvlanframes_g
txoversize_g
rxframecount_gb
rxoctetcount_gb
rxoctetcount_g
rxbroadcastframes_g
rxmulticastframes_g
rxcrcerror
rxalignmenterror
rxrunterror
rxjabbererror
rxundersize_g
rxoversize_g
rx64octets_gb
rx65to127octets_gb
rx128to255octets_gb
rx256to511octets_gb
rx512to1023octets_gb
rx1024tomaxoctets_gb
rxunicastframes_g
rxlengtherror
rxoutofrangetype
rxpauseframes
rxfifooverflow
rxvlanframes_gb
rxwatchdogerror
rxrcverror
rxctrlframes_g
MMC_IPC_Receive_Interrupt_Mask
MMC_IPC_Receive_Interrupt
rxipv4_gd_frms
rxipv4_hdrerr_frms
rxipv4_nopay_frms
rxipv4_frag_frms
rxipv4_udsbl_frms
rxipv6_gd_frms
rxipv6_hdrerr_frms
rxipv6_nopay_frms
rxudp_gd_frms
rxudp_err_frms
rxtcp_gd_frms
rxtcp_err_frms
rxicmp_gd_frms
rxicmp_err_frms
rxipv4_gd_octets
rxipv4_hdrerr_octets
rxipv4_nopay_octets
rxipv4_frag_octets
rxipv4_udsbl_octets
rxipv6_gd_octets
rxipv6_hdrerr_octets
rxipv6_nopay_octets
rxudp_gd_octets
rxudp_err_octets
rxtcp_gd_octets
rxtcperroctets
rxicmp_gd_octets
rxicmp_err_octets
L3_L4_Control0
Layer4_Address0
Layer3_Addr0_Reg0
Layer3_Addr1_Reg0
Layer3_Addr2_Reg0
Layer3_Addr3_Reg0
L3_L4_Control1
Layer4_Address1
Layer3_Addr0_Reg1
Layer3_Addr1_Reg1
Layer3_Addr2_Reg1
Layer3_Addr3_Reg1
L3_L4_Control2
Layer4_Address2
Layer3_Addr0_Reg2
Layer3_Addr1_Reg2
Layer3_Addr2_Reg2
Layer3_Addr3_Reg2
L3_L4_Control3
Layer4_Address3
Layer3_Addr0_Reg3
Layer3_Addr1_Reg3
Layer3_Addr2_Reg3
Layer3_Addr3_Reg3
Hash_Table_Reg0
Hash_Table_Reg1
Hash_Table_Reg2
Hash_Table_Reg3
Hash_Table_Reg4
Hash_Table_Reg5
Hash_Table_Reg6
Hash_Table_Reg7
VLAN_Hash_Table_Reg
Timestamp_Control
Sub_Second_Increment
System_Time_Seconds
System_Time_Nanoseconds
System_Time_Seconds_Update
System_Time_Nanoseconds_Update
Timestamp_Addend
Target_Time_Seconds
Target_Time_Nanoseconds
System_Time_Higher_Word_Seconds
Timestamp_Status
PPS_Control
Auxiliary_Timestamp_Nanoseconds
Auxiliary_Timestamp_Seconds
PPS0_Interval
PPS0_Width
MAC_Address16_High
MAC_Address16_Low
MAC_Address17_High
MAC_Address17_Low
MAC_Address18_High
MAC_Address18_Low
MAC_Address19_High
MAC_Address19_Low
MAC_Address20_High
MAC_Address20_Low
MAC_Address21_High
MAC_Address21_Low
MAC_Address22_High
MAC_Address22_Low
MAC_Address23_High
MAC_Address23_Low
MAC_Address24_High
MAC_Address24_Low
MAC_Address25_High
MAC_Address25_Low
MAC_Address26_High
MAC_Address26_Low
MAC_Address27_High
MAC_Address27_Low
MAC_Address28_High
MAC_Address28_Low
MAC_Address29_High
MAC_Address29_Low
MAC_Address30_High
MAC_Address30_Low
MAC_Address31_High
MAC_Address31_Low
MAC_Address32_High
MAC_Address32_Low
MAC_Address33_High
MAC_Address33_Low
MAC_Address34_High
MAC_Address34_Low
MAC_Address35_High
MAC_Address35_Low
MAC_Address36_High
MAC_Address36_Low
MAC_Address37_High
MAC_Address37_Low
MAC_Address38_High
MAC_Address38_Low
MAC_Address39_High
MAC_Address39_Low
MAC_Address40_High
MAC_Address40_Low
MAC_Address41_High
MAC_Address41_Low
MAC_Address42_High
MAC_Address42_Low
MAC_Address43_High
MAC_Address43_Low
MAC_Address44_High
MAC_Address44_Low
MAC_Address45_High
MAC_Address45_Low
MAC_Address46_High
MAC_Address46_Low
MAC_Address47_High
MAC_Address47_Low
MAC_Address48_High
MAC_Address48_Low
MAC_Address49_High
MAC_Address49_Low
MAC_Address50_High
MAC_Address50_Low
MAC_Address51_High
MAC_Address51_Low
MAC_Address52_High
MAC_Address52_Low
MAC_Address53_High
MAC_Address53_Low
MAC_Address54_High
MAC_Address54_Low
MAC_Address55_High
MAC_Address55_Low
MAC_Address56_High
MAC_Address56_Low
MAC_Address57_High
MAC_Address57_Low
MAC_Address58_High
MAC_Address58_Low
MAC_Address59_High
MAC_Address59_Low
MAC_Address60_High
MAC_Address60_Low
MAC_Address61_High
MAC_Address61_Low
MAC_Address62_High
MAC_Address62_Low
MAC_Address63_High
MAC_Address63_Low
MAC_Address64_High
MAC_Address64_Low
MAC_Address65_High
MAC_Address65_Low
MAC_Address66_High
MAC_Address66_Low
MAC_Address67_High
MAC_Address67_Low
MAC_Address68_High
MAC_Address68_Low
MAC_Address69_High
MAC_Address69_Low
MAC_Address70_High
MAC_Address70_Low
MAC_Address71_High
MAC_Address71_Low
MAC_Address72_High
MAC_Address72_Low
MAC_Address73_High
MAC_Address73_Low
MAC_Address74_High
MAC_Address74_Low
MAC_Address75_High
MAC_Address75_Low
MAC_Address76_High
MAC_Address76_Low
MAC_Address77_High
MAC_Address77_Low
MAC_Address78_High
MAC_Address78_Low
MAC_Address79_High
MAC_Address79_Low
MAC_Address80_High
MAC_Address80_Low
MAC_Address81_High
MAC_Address81_Low
MAC_Address82_High
MAC_Address82_Low
MAC_Address83_High
MAC_Address83_Low
MAC_Address84_High
MAC_Address84_Low
MAC_Address85_High
MAC_Address85_Low
MAC_Address86_High
MAC_Address86_Low
MAC_Address87_High
MAC_Address87_Low
MAC_Address88_High
MAC_Address88_Low
MAC_Address89_High
MAC_Address89_Low
MAC_Address90_High
MAC_Address90_Low
MAC_Address91_High
MAC_Address91_Low
MAC_Address92_High
MAC_Address92_Low
MAC_Address93_High
MAC_Address93_Low
MAC_Address94_High
MAC_Address94_Low
MAC_Address95_High
MAC_Address95_Low
MAC_Address96_High
MAC_Address96_Low
MAC_Address97_High
MAC_Address97_Low
MAC_Address98_High
MAC_Address98_Low
MAC_Address99_High
MAC_Address99_Low
MAC_Address100_High
MAC_Address100_Low
MAC_Address101_High
MAC_Address101_Low
MAC_Address102_High
MAC_Address102_Low
MAC_Address103_High
MAC_Address103_Low
MAC_Address104_High
MAC_Address104_Low
MAC_Address105_High
MAC_Address105_Low
MAC_Address106_High
MAC_Address106_Low
MAC_Address107_High
MAC_Address107_Low
MAC_Address108_High
MAC_Address108_Low
MAC_Address109_High
MAC_Address109_Low
MAC_Address110_High
MAC_Address110_Low
MAC_Address111_High
MAC_Address111_Low
MAC_Address112_High
MAC_Address112_Low
MAC_Address113_High
MAC_Address113_Low
MAC_Address114_High
MAC_Address114_Low
MAC_Address115_High
MAC_Address115_Low
MAC_Address116_High
MAC_Address116_Low
MAC_Address117_High
MAC_Address117_Low
MAC_Address118_High
MAC_Address118_Low
MAC_Address119_High
MAC_Address119_Low
MAC_Address120_High
MAC_Address120_Low
MAC_Address121_High
MAC_Address121_Low
MAC_Address122_High
MAC_Address122_Low
MAC_Address123_High
MAC_Address123_Low
MAC_Address124_High
MAC_Address124_Low
MAC_Address125_High
MAC_Address125_Low
MAC_Address126_High
MAC_Address126_Low
MAC_Address127_High
MAC_Address127_Low
DMA Register Group Register Descriptions
Bus_Mode
Transmit_Poll_Demand
Receive_Poll_Demand
Receive_Descriptor_List_Address
Transmit_Descriptor_List_Address
Status
Operation_Mode
Interrupt_Enable
Missed_Frame_And_Buffer_Overflow_Counter
Receive_Interrupt_Watchdog_Timer
AXI_Bus_Mode
AHB_or_AXI_Status
Current_Host_Transmit_Descriptor
Current_Host_Receive_Descriptor
Current_Host_Transmit_Buffer_Address
Current_Host_Receive_Buffer_Address
HW_Feature
SDMMC Module Address Map
SDMMC Module Summary
ctrl
pwren
clkdiv
clksrc
clkena
tmout
ctype
blksiz
bytcnt
intmask
cmdarg
cmd
resp0
resp1
resp2
resp3
mintsts
rintsts
status
fifoth
cdetect
wrtprt
tcbcnt
tbbcnt
debnce
usrid
verid
hcon
uhs_reg
rst_n
bmod
pldmnd
dbaddr
idsts
idinten
dscaddr
bufaddr
cardthrctl
back_end_power_r
data
QSPI Flash Controller Module Registers Address Map
QSPI Flash Controller Module Registers Summary
cfg
devrd
devwr
delay
rddatacap
devsz
srampart
indaddrtrig
dmaper
remapaddr
modebit
sramfill
txthresh
rxthresh
irqstat
irqmask
lowwrprot
uppwrprot
wrprot
indrd
indrdwater
indrdstaddr
indrdcnt
indwr
indwrwater
indwrstaddr
indwrcnt
flashcmd
flashcmdaddr
flashcmdrddatalo
flashcmdrddataup
flashcmdwrdatalo
flashcmdwrdataup
moduleid
FPGA Manager Module Address Map
FPGA Manager Module Summary
stat
ctrl
dclkcnt
dclkstat
gpo
gpi
misci
Configuration Monitor (MON) Registers Register Descriptions
gpio_inten
gpio_intmask
gpio_inttype_level
gpio_int_polarity
gpio_intstatus
gpio_raw_intstatus
gpio_porta_eoi
gpio_ext_porta
gpio_ls_sync
gpio_ver_id_code
gpio_config_reg2
gpio_config_reg1
ACP ID Mapper Registers Address Map
ACP ID Mapper Registers Summary
vid2rd
vid2wr
vid3rd
vid3wr
vid4rd
vid4wr
vid5rd
vid5wr
vid6rd
vid6wr
dynrd
dynwr
vid2rd_s
vid2wr_s
vid3rd_s
vid3wr_s
vid4rd_s
vid4wr_s
vid5rd_s
vid5wr_s
vid6rd_s
vid6wr_s
dynrd_s
dynwr_s
GPIO Module Address Map
GPIO Module Summary
gpio_swporta_dr
gpio_swporta_ddr
gpio_inten
gpio_intmask
gpio_inttype_level
gpio_int_polarity
gpio_intstatus
gpio_raw_intstatus
gpio_debounce
gpio_porta_eoi
gpio_ext_porta
gpio_ls_sync
gpio_id_code
gpio_ver_id_code
gpio_config_reg2
gpio_config_reg1
L3 (NIC-301) GPV Registers Address Map
L3 (NIC-301) GPV Registers Summary
remap
Security Register Group Register Descriptions
l4main
l4sp
l4mp
l4osc1
l4spim
stm
lwhps2fpgaregs
usb1
nanddata
usb0
nandregs
qspidata
fpgamgrdata
hps2fpgaregs
acp
rom
ocram
sdrdata
ID Register Group Register Descriptions
periph_id_4
periph_id_0
periph_id_1
periph_id_2
periph_id_3
comp_id_0
comp_id_1
comp_id_2
comp_id_3
Master Register Group Register Descriptions
L4 MAIN Register Descriptions
fn_mod_bm_iss
L4 SP Register Descriptions
fn_mod_bm_iss
L4 MP Register Descriptions
fn_mod_bm_iss
L4 OSC1 Register Descriptions
fn_mod_bm_iss
L4 SPIM Register Descriptions
fn_mod_bm_iss
STM Register Descriptions
fn_mod_bm_iss
fn_mod
LWHPS2FPGA Register Descriptions
fn_mod_bm_iss
fn_mod
USB1 Register Descriptions
fn_mod_bm_iss
ahb_cntl
NANDDATA Register Descriptions
fn_mod_bm_iss
fn_mod
USB0 Register Descriptions
fn_mod_bm_iss
ahb_cntl
NANDREGS Register Descriptions
fn_mod_bm_iss
fn_mod
QSPIDATA Register Descriptions
fn_mod_bm_iss
ahb_cntl
FPGAMGRDATA Register Descriptions
fn_mod_bm_iss
wr_tidemark
fn_mod
HPS2FPGA Register Descriptions
fn_mod_bm_iss
wr_tidemark
fn_mod
ACP Register Descriptions
fn_mod_bm_iss
fn_mod
Boot ROM Register Descriptions
fn_mod_bm_iss
fn_mod
On-chip RAM Register Descriptions
fn_mod_bm_iss
wr_tidemark
fn_mod
Slave Register Group Register Descriptions
DAP Register Descriptions
fn_mod2
fn_mod_ahb
read_qos
write_qos
fn_mod
MPU Register Descriptions
read_qos
write_qos
fn_mod
SDMMC Register Descriptions
fn_mod_ahb
read_qos
write_qos
fn_mod
DMA Register Descriptions
read_qos
write_qos
fn_mod
FPGA2HPS Register Descriptions
wr_tidemark
read_qos
write_qos
fn_mod
ETR Register Descriptions
read_qos
write_qos
fn_mod
EMAC0 Register Descriptions
read_qos
write_qos
fn_mod
EMAC1 Register Descriptions
read_qos
write_qos
fn_mod
USB0 Register Descriptions
fn_mod_ahb
read_qos
write_qos
fn_mod
NAND Register Descriptions
read_qos
write_qos
fn_mod
USB1 Register Descriptions
fn_mod_ahb
read_qos
write_qos
fn_mod
NAND Controller Module Data (AXI Slave) Address Map
QSPI Flash Module Data (AHB Slave) Address Map
USB OTG Controller Module Registers Address Map
USB OTG Controller Module Registers Summary
Global Registers Register Descriptions
gotgctl
gotgint
gahbcfg
gusbcfg
grstctl
gintsts
gintmsk
grxstsr
grxstsp
grxfsiz
gnptxfsiz
gnptxsts
gpvndctl
ggpio
guid
gsnpsid
ghwcfg1
ghwcfg2
ghwcfg3
ghwcfg4
gdfifocfg
hptxfsiz
dieptxf1
dieptxf2
dieptxf3
dieptxf4
dieptxf5
dieptxf6
dieptxf7
dieptxf8
dieptxf9
dieptxf10
dieptxf11
dieptxf12
dieptxf13
dieptxf14
dieptxf15
Host Mode Registers Register Descriptions
hcfg
hfir
hfnum
hptxsts
haint
haintmsk
hflbaddr
hprt
hcchar0
hcsplt0
hcint0
hcintmsk0
hctsiz0
hcdma0
hcdmab0
hcchar1
hcsplt1
hcint1
hcintmsk1
hctsiz1
hcdma1
hcdmab1
hcchar2
hcsplt2
hcint2
hcintmsk2
hctsiz2
hcdma2
hcdmab2
hcchar3
hcsplt3
hcint3
hcintmsk3
hctsiz3
hcdma3
hcdmab3
hcchar4
hcsplt4
hcint4
hcintmsk4
hctsiz4
hcdma4
hcdmab4
hcchar5
hcsplt5
hcint5
hcintmsk5
hctsiz5
hcdma5
hcdmab5
hcchar6
hcsplt6
hcint6
hcintmsk6
hctsiz6
hcdma6
hcdmab6
hcchar7
hcsplt7
hcint7
hcintmsk7
hctsiz7
hcdma7
hcdmab7
hcchar8
hcsplt8
hcint8
hcintmsk8
hctsiz8
hcdma8
hcdmab8
hcchar9
hcsplt9
hcint9
hcintmsk9
hctsiz9
hcdma9
hcdmab9
hcchar10
hcsplt10
hcint10
hcintmsk10
hctsiz10
hcdma10
hcdmab10
hcchar11
HCSPLT11
hcint11
hcintmsk11
hctsiz11
hcdma11
hcdmab11
hcchar12
hcsplt12
hcint12
hcintmsk12
hctsiz12
hcdma12
hcdmab12
hcchar13
hcsplt13
hcint13
hcintmsk13
hctsiz13
hcdma13
hcdmab13
hcchar14
hcsplt14
hcint14
hcintmsk14
hctsiz14
hcdma14
hcdmab14
hcchar15
hcsplt15
hcint15
hcintmsk15
hctsiz15
hcdma15
hcdmab15
Device Mode Registers Register Descriptions
dcfg
dctl
dsts
diepmsk
doepmsk
daint
daintmsk
dvbusdis
dvbuspulse
dthrctl
diepempmsk
diepctl0
diepint0
dieptsiz0
diepdma0
dtxfsts0
diepdmab0
diepctl1
diepint1
dieptsiz1
diepdma1
dtxfsts1
diepdmab1
diepctl2
diepint2
dieptsiz2
diepdma2
DTXFSTS2
diepdmab2
diepctl3
diepint3
dieptsiz3
diepdma3
dtxfsts3
diepdmab3
diepctl4
diepint4
dieptsiz4
diepdma4
dtxfsts4
diepdmab4
diepctl5
diepint5
dieptsiz5
diepdma5
dtxfsts5
diepdmab5
diepctl6
diepint6
dieptsiz6
diepdma6
dtxfsts6
diepdmab6
diepctl7
diepint7
dieptsiz7
diepdma7
dtxfsts7
diepdmab7
diepctl8
diepint8
dieptsiz8
diepdma8
dtxfsts8
diepdmab8
diepctl9
diepint9
dieptsiz9
diepdma9
dtxfsts9
diepdmab9
diepctl10
diepint10
dieptsiz10
diepdma10
dtxfsts10
diepdmab10
diepctl11
diepint11
dieptsiz11
diepdma11
dtxfsts11
diepdmab11
diepctl12
diepint12
dieptsiz12
diepdma12
dtxfsts12
diepdmab12
diepctl13
diepint13
dieptsiz13
diepdma13
dtxfsts13
diepdmab13
diepctl14
diepint14
dieptsiz14
diepdma14
dtxfsts14
diepdmab14
diepctl15
diepint15
dieptsiz15
diepdma15
dtxfsts15
diepdmab15
doepctl0
doepint0
doeptsiz0
doepdma0
doepdmab0
doepctl1
doepint1
doeptsiz1
doepdma1
doepdmab1
DOEPCTL2
doepint2
doeptsiz2
doepdma2
doepdmab2
DOEPCTL3
doepint3
doeptsiz3
doepdma3
doepdmab3
doepctl4
Doepint4
doeptsiz4
doepdma4
doepdmab4
doepctl5
doepint5
doeptsiz5
doepdma5
doepdmab5
doepctl6
doepint6
doeptsiz6
doepdma6
doepdmab6
doepctl7
doepint7
doeptsiz7
doepdma7
doepdmab7
doepctl8
doepint8
doeptsiz8
doepdma8
doepdmab8
doepctl9
doepint9
doeptsiz9
doepdma9
doepdmab9
doepctl10
doepint10
doeptsiz10
doepdma10
doepdmab10
doepctl11
doepint11
doeptsiz11
doepdma11
doepdmab11
doepctl12
doepint12
doeptsiz12
doepdma12
doepdmab12
doepctl13
doepint13
doeptsiz13
doepdma13
doepdmab13
doepctl14
doepint14
doeptsiz14
doepdma14
doepdmab14
doepctl15
doepint15
doeptsiz15
doepdma15
doepdmab15
Power and Clock Gating Register Register Descriptions
pcgcctl
USB Data FIFO Address Map
USB Direct Access FIFO RAM Address Map
NAND Flash Controller Module Registers (AXI Slave) Address Map
NAND Flash Controller Module Registers (AXI Slave) Summary
Configuration registers Register Descriptions
device_reset
transfer_spare_reg
load_wait_cnt
program_wait_cnt
erase_wait_cnt
int_mon_cyccnt
rb_pin_enabled
multiplane_operation
multiplane_read_enable
copyback_disable
cache_write_enable
cache_read_enable
prefetch_mode
chip_enable_dont_care
ecc_enable
global_int_enable
twhr2_and_we_2_re
tcwaw_and_addr_2_data
re_2_we
acc_clks
number_of_planes
pages_per_block
device_width
device_main_area_size
device_spare_area_size
two_row_addr_cycles
multiplane_addr_restrict
ecc_correction
read_mode
write_mode
copyback_mode
rdwr_en_lo_cnt
rdwr_en_hi_cnt
max_rd_delay
cs_setup_cnt
spare_area_skip_bytes
spare_area_marker
devices_connected
die_mask
first_block_of_next_plane
write_protect
re_2_re
por_reset_count
watchdog_reset_count
Device parameters Register Descriptions
manufacturer_id
device_id
device_param_0
device_param_1
device_param_2
logical_page_data_size
logical_page_spare_size
revision
onfi_device_features
onfi_optional_commands
onfi_timing_mode
onfi_pgm_cache_timing_mode
onfi_device_no_of_luns
onfi_device_no_of_blocks_per_lun_l
onfi_device_no_of_blocks_per_lun_u
features
Interrupt and Status Registers Register Descriptions
transfer_mode
intr_status0
intr_en0
page_cnt0
err_page_addr0
err_block_addr0
intr_status1
intr_en1
page_cnt1
err_page_addr1
err_block_addr1
intr_status2
intr_en2
page_cnt2
err_page_addr2
err_block_addr2
intr_status3
intr_en3
page_cnt3
err_page_addr3
err_block_addr3
ECC registers Register Descriptions
ECCCorInfo_b01
ECCCorInfo_b23
DMA registers Register Descriptions
dma_enable
dma_intr
dma_intr_en
target_err_addr_lo
target_err_addr_hi
flash_burst_length
chip_interleave_enable_and_allow_int_reads
no_of_blocks_per_lun
lun_status_cmd
FPGA Manager Module Configuration Data Address Map
FPGA Manager Module Configuration Data Summary
data
CAN Controller Module Address Map
CAN Controller Module Summary
Protocol Group Register Descriptions
CCTRL
CSTS
CERC
CBT
CIR
CTR
CFR
CRR
HWS
Message Handler Group Register Descriptions
MOTRX
MOTRA
MOTRB
MOTRC
MOTRD
MONDX
MONDA
MONDB
MONDC
MONDD
MOIPX
MOIPA
MOIPB
MOIPC
MOIPD
MOVALX
MOVALA
MOVALB
MOVALC
MOVALD
Message Interface Group Register Descriptions
IF1CMR
IF1MSK
IF1ARB
IF1MCTR
IF1DA
IF1DB
IF2CMR
IF2MSK
IF2ARB
IF2MCTR
IF2DA
IF2DB
UART Module Address Map
UART Module Summary
rbr_thr_dll
ier_dlh
iir
fcr
lcr
mcr
lsr
msr
scr
srbr
sthr
far
tfr
RFW
usr
tfl
rfl
srr
srts
sbcr
sdmam
sfe
srt
stet
htx
dmasa
cpr
ucv
ctr
I2C Module Address Map
I2C Module Summary
ic_con
ic_tar
ic_sar
ic_data_cmd
ic_ss_scl_hcnt
ic_ss_scl_lcnt
ic_fs_scl_hcnt
ic_fs_scl_lcnt
ic_intr_stat
ic_intr_mask
ic_raw_intr_stat
ic_rx_tl
ic_tx_tl
ic_clr_intr
ic_clr_rx_under
ic_clr_rx_over
ic_clr_tx_over
ic_clr_rd_req
ic_clr_tx_abrt
ic_clr_rx_done
ic_clr_activity
ic_clr_stop_det
ic_clr_start_det
ic_clr_gen_call
ic_enable
ic_status
ic_txflr
ic_rxflr
ic_sda_hold
ic_tx_abrt_source
ic_slv_data_nack_only
ic_dma_cr
ic_dma_tdlr
ic_dma_rdlr
ic_sda_setup
ic_ack_general_call
ic_enable_status
ic_fs_spklen
ic_comp_param_1
ic_comp_version
ic_comp_type
Timer Module Address Map
Timer Module Summary
timer1loadcount
timer1currentval
timer1controlreg
timer1eoi
timer1intstat
timersintstat
timerseoi
timersrawintstat
timerscompversion
SDRAM Controller Address Map
SDRAM Controller Summary
SDRAM Controller Module Register Descriptions
ctrlcfg
dramtiming1
dramtiming2
dramtiming3
dramtiming4
lowpwrtiming
dramodt
dramaddrw
dramifwidth
dramsts
dramintr
sbecount
dbecount
erraddr
dropcount
dropaddr
lowpwreq
lowpwrack
staticcfg
ctrlwidth
portcfg
fpgaportrst
protportdefault
protruleaddr
protruleid
protruledata
protrulerdwr
mppriority
remappriority
Port Sum of Weight Register Register Descriptions
mpweight_0_4
mpweight_1_4
mpweight_2_4
mpweight_3_4
L4 Watchdog Module Address Map
L4 Watchdog Module Summary
wdt_cr
wdt_torr
wdt_ccvr
wdt_crr
wdt_stat
wdt_eoi
cp_wdt_user_top_max
cp_wdt_user_top_init_max
cd_wdt_top_rst
cp_wdt_cnt_rst
wdt_comp_param_1
wdt_comp_version
wdt_comp_type
Clock Manager Module Address Map
Clock Manager Module Summary
ctrl
bypass
inter
intren
dbctrl
stat
Main PLL Group Register Descriptions
vco
misc
mpuclk
mainclk
dbgatclk
mainqspiclk
mainnandsdmmcclk
cfgs2fuser0clk
en
maindiv
dbgdiv
tracediv
l4src
stat
Peripheral PLL Group Register Descriptions
vco
misc
emac0clk
emac1clk
perqspiclk
pernandsdmmcclk
perbaseclk
s2fuser1clk
en
div
gpiodiv
src
stat
SDRAM PLL Group Register Descriptions
vco
ctrl
ddrdqsclk
ddr2xdqsclk
ddrdqclk
s2fuser2clk
en
stat
Altera Group Register Descriptions
alt_mpuclk
alt_mainclk
alt_dbgatclk
Reset Manager Module Address Map
Reset Manager Module Summary
stat
ctrl
counts
mpumodrst
permodrst
per2modrst
brgmodrst
miscmodrst
tstscratch
System Manager Module Address Map
System Manager Module Summary
siliconid1
siliconid2
wddbg
bootinfo
hpsinfo
parityinj
FPGA Interface Group Register Descriptions
gbl
indiv
module
Scan Manager Group Register Descriptions
ctrl
Freeze Control Group Register Descriptions
vioctrl
hioctrl
src
hwctrl
EMAC Group Register Descriptions
ctrl
l3master
DMA Controller Group Register Descriptions
ctrl
persecurity
Preloader (initial software) Group Register Descriptions
handoff
Boot ROM Code Register Group Register Descriptions
ctrl
cpu1startaddr
initswstate
initswlastld
bootromswstate
Warm Boot from On-Chip RAM Group Register Descriptions
enable
datastart
length
execution
crc
Boot ROM Hardware Register Group Register Descriptions
ctrl
SDMMC Controller Group Register Descriptions
ctrl
l3master
NAND Flash Controller Register Group Register Descriptions
bootstrap
l3master
USB Controller Group Register Descriptions
l3master
ECC Management Register Group Register Descriptions
l2
ocram
usb0
usb1
emac0
emac1
dma
can0
can1
nand
qspi
sdmmc
Pin Mux Control Group Register Descriptions
EMACIO0
EMACIO1
EMACIO2
EMACIO3
EMACIO4
EMACIO5
EMACIO6
EMACIO7
EMACIO8
EMACIO9
EMACIO10
EMACIO11
EMACIO12
EMACIO13
FLASHIO0
FLASHIO1
FLASHIO2
FLASHIO3
FLASHIO4
FLASHIO5
FLASHIO6
FLASHIO7
FLASHIO8
FLASHIO9
FLASHIO10
FLASHIO11
GENERALIO0
GENERALIO1
GENERALIO2
GENERALIO3
GENERALIO4
GENERALIO5
GENERALIO6
GENERALIO7
GENERALIO8
GENERALIO9
GENERALIO10
GENERALIO11
GENERALIO12
GENERALIO13
GENERALIO14
GENERALIO15
GENERALIO16
GENERALIO17
GENERALIO18
MIXED1IO0
MIXED1IO1
MIXED1IO2
MIXED1IO3
MIXED1IO4
MIXED1IO5
MIXED1IO6
MIXED1IO7
MIXED1IO8
MIXED1IO9
MIXED1IO10
MIXED1IO11
MIXED1IO12
MIXED1IO13
MIXED1IO14
MIXED1IO15
MIXED1IO16
MIXED1IO17
MIXED1IO18
MIXED1IO19
MIXED1IO20
MIXED1IO21
GPLINMUX48
GPLINMUX49
GPLINMUX50
GPLINMUX51
GPLINMUX52
GPLINMUX53
GPLINMUX54
GPLINMUX55
GPLINMUX56
GPLINMUX57
GPLINMUX58
GPLINMUX59
GPLINMUX60
GPLINMUX61
GPLINMUX62
GPLINMUX63
GPLINMUX64
GPLINMUX65
GPLINMUX66
GPLINMUX67
GPLINMUX68
GPLINMUX69
GPLINMUX70
GPLMUX0
GPLMUX1
GPLMUX2
GPLMUX3
GPLMUX4
GPLMUX5
GPLMUX6
GPLMUX7
GPLMUX8
GPLMUX9
GPLMUX10
GPLMUX11
GPLMUX12
GPLMUX13
GPLMUX14
GPLMUX15
GPLMUX16
GPLMUX17
GPLMUX18
GPLMUX19
GPLMUX20
GPLMUX21
GPLMUX22
GPLMUX23
GPLMUX24
GPLMUX25
GPLMUX26
GPLMUX27
GPLMUX28
GPLMUX29
GPLMUX30
GPLMUX31
GPLMUX32
GPLMUX33
GPLMUX34
GPLMUX35
GPLMUX36
GPLMUX37
GPLMUX38
GPLMUX39
GPLMUX40
GPLMUX41
GPLMUX42
GPLMUX43
GPLMUX44
GPLMUX45
GPLMUX46
GPLMUX47
GPLMUX48
GPLMUX49
GPLMUX50
GPLMUX51
GPLMUX52
GPLMUX53
GPLMUX54
GPLMUX55
GPLMUX56
GPLMUX57
GPLMUX58
GPLMUX59
GPLMUX60
GPLMUX61
GPLMUX62
GPLMUX63
GPLMUX64
GPLMUX65
GPLMUX66
GPLMUX67
GPLMUX68
GPLMUX69
GPLMUX70
UART0USEFPGA
RGMII1USEFPGA
SPIS0USEFPGA
CAN0USEFPGA
I2C0USEFPGA
SDMMCUSEFPGA
QSPIUSEFPGA
SPIS1USEFPGA
RGMII0USEFPGA
UART1USEFPGA
CAN1USEFPGA
I2C3USEFPGA
I2C2USEFPGA
I2C1USEFPGA
SPIM1USEFPGA
SPIM0USEFPGA
Non-Secure DMA Module Address Map
Secure DMA Module Address Map
SPI Slave Module Address Map
SPI Slave Module Summary
ctrlr0
spienr
mwcr
txftlr
rxftlr
txflr
rxflr
sr
imr
isr
risr
txoicr
rxoicr
rxuicr
icr
dmacr
dmatdlr
dmardlr
idr
spi_version_id
dr
SPI Master Module Address Map
SPI Master Module Summary
ctrlr0
ctrlr1
spienr
mwcr
ser
baudr
txftlr
rxftlr
txflr
rxflr
sr
imr
isr
risr
txoicr
rxoicr
rxuicr
icr
dmacr
dmatdlr
dmardlr
idr
spi_version_id
dr
rx_sample_dly
Scan Manager Module Registers Address Map
Scan Manager Module Registers Summary
stat
en
fifosinglebyte
fifodoublebyte
fifotriplebyte
fifoquadbyte
Boot ROM Address Map
MPU Address Map
MPU L2 Cache Controller (L2C-310) Module Address Map
On-chip RAM Address Map
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