MAC_Address96_High

The MAC Address96 High register holds the upper 16 bits of the 97th 6-byte MAC address of the station. Because the MAC address registers are configured to be double-synchronized to the (G)MII clock domains, the synchronization is triggered only when bits[31:24] (in little-endian mode) or Bits[7:0] (in big-endian mode) of the MAC Address96 Low Register are written. For proper synchronization updates, the consecutive writes to this Address Low Register should be performed after at least four clock cycles in the destination clock domain. Note that all MAC Address High registers (except MAC Address0 High) have the same format.
Module Instance Base Address Register Address
emac0 0xFF700000 0xFF700A80
emac1 0xFF702000 0xFF702A80

Offset: 0xA80

Access: RW

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

ae

RW 0x0

sa

RW 0x0

mbc_5

RW 0x0

mbc_4

RW 0x0

mbc_3

RW 0x0

mbc_2

RW 0x0

mbc_1

RW 0x0

mbc_0

RW 0x0

Reserved
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

addrhi

RW 0xFFFF

MAC_Address96_High Fields

Bit Name Description Access Reset
31 ae

When this bit is enabled, the address filter block uses the 97th MAC address for perfect filtering. When this bit is disabled, the address filter block ignores the address for filtering.

Value Description
0x0 Second MAC address filtering disabled
0x1 Second MAC address filtering enabled
RW 0x0
30 sa

When this bit is enabled, the MAC Address96[47:0] is used to compare with the SA fields of the received frame. When this bit is disabled, the MAC Address96[47:0] is used to compare with the DA fields of the received frame.

Value Description
0x0 MAC address compare disabled
0x1 MAC address compare enabled
RW 0x0
29 mbc_5

This array of bits are mask control bits for comparison of each of the MAC Address bytes. When masked, the MAC does not compare the corresponding byte of received DA or SA with the contents of MAC Address96 high and low registers. Each bit controls the masking of the bytes. You can filter a group of addresses (known as group address filtering) by masking one or more bytes of the address. The array index corresponds to the byte (e.g. index 0 is for bits 7:0).

Value Description
0x0 Byte is unmasked (i.e. is compared)
0x1 Byte is masked (i.e. not compared)
RW 0x0
28 mbc_4

This array of bits are mask control bits for comparison of each of the MAC Address bytes. When masked, the MAC does not compare the corresponding byte of received DA or SA with the contents of MAC Address96 high and low registers. Each bit controls the masking of the bytes. You can filter a group of addresses (known as group address filtering) by masking one or more bytes of the address. The array index corresponds to the byte (e.g. index 0 is for bits 7:0).

Value Description
0x0 Byte is unmasked (i.e. is compared)
0x1 Byte is masked (i.e. not compared)
RW 0x0
27 mbc_3

This array of bits are mask control bits for comparison of each of the MAC Address bytes. When masked, the MAC does not compare the corresponding byte of received DA or SA with the contents of MAC Address96 high and low registers. Each bit controls the masking of the bytes. You can filter a group of addresses (known as group address filtering) by masking one or more bytes of the address. The array index corresponds to the byte (e.g. index 0 is for bits 7:0).

Value Description
0x0 Byte is unmasked (i.e. is compared)
0x1 Byte is masked (i.e. not compared)
RW 0x0
26 mbc_2

This array of bits are mask control bits for comparison of each of the MAC Address bytes. When masked, the MAC does not compare the corresponding byte of received DA or SA with the contents of MAC Address96 high and low registers. Each bit controls the masking of the bytes. You can filter a group of addresses (known as group address filtering) by masking one or more bytes of the address. The array index corresponds to the byte (e.g. index 0 is for bits 7:0).

Value Description
0x0 Byte is unmasked (i.e. is compared)
0x1 Byte is masked (i.e. not compared)
RW 0x0
25 mbc_1

This array of bits are mask control bits for comparison of each of the MAC Address bytes. When masked, the MAC does not compare the corresponding byte of received DA or SA with the contents of MAC Address96 high and low registers. Each bit controls the masking of the bytes. You can filter a group of addresses (known as group address filtering) by masking one or more bytes of the address. The array index corresponds to the byte (e.g. index 0 is for bits 7:0).

Value Description
0x0 Byte is unmasked (i.e. is compared)
0x1 Byte is masked (i.e. not compared)
RW 0x0
24 mbc_0

This array of bits are mask control bits for comparison of each of the MAC Address bytes. When masked, the MAC does not compare the corresponding byte of received DA or SA with the contents of MAC Address96 high and low registers. Each bit controls the masking of the bytes. You can filter a group of addresses (known as group address filtering) by masking one or more bytes of the address. The array index corresponds to the byte (e.g. index 0 is for bits 7:0).

Value Description
0x0 Byte is unmasked (i.e. is compared)
0x1 Byte is masked (i.e. not compared)
RW 0x0
15:0 addrhi

This field contains the upper 16 bits (47:32) of the 97th 6-byte MAC address.

 RW 0xFFFF