wdt_crr
Restarts the watchdog.
Module Instance | Base Address | Register Address |
---|---|---|
l4wd0 | 0xFFD02000 | 0xFFD0200C |
l4wd1 | 0xFFD03000 | 0xFFD0300C |
Offset: 0xC
Access: WO
Important: To prevent indeterminate
system behavior, reserved areas of memory must not be accessed by software or
hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
Bit Fields | |||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reserved |
|||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved |
wdt_crr WO 0x0 |
wdt_crr Fields
Bit | Name | Description | Access | Reset | ||||
---|---|---|---|---|---|---|---|---|
7:0 | wdt_crr | This register is used to restart the watchdog counter. As a safety feature to prevent accidental restarts, the kick value of 0x76 must be written. A restart also clears the watchdog interrupt.
|
WO | 0x0 |