flashcmd

Module Instance Base Address Register Address
qspiregs 0xFF705000 0xFF705090

Offset: 0x90

Access: RW

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

cmdopcode

RW 0x0

enrddata

RW 0x0

numrddatabytes

RW 0x0

encmdaddr

RW 0x0

enmodebit

RW 0x0

numaddrbytes

RW 0x0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

enwrdata

RW 0x0

numwrdatabytes

RW 0x0

numdummybytes

RW 0x0

Reserved

cmdexecstat

RO 0x0

execcmd

RW 0x0

flashcmd Fields

Bit Name Description Access Reset
31:24 cmdopcode

The command opcode field should be setup before triggering the command. For example, 0x20 maps to SubSector Erase. Writeing to the execute field (bit 0) of this register launches the command. NOTE : Using this approach to issue commands to the device will make use of the instruction type of the device instruction configuration register. If this field is set to 2'b00, then the command opcode, command address, command dummy bytes and command data will all be transferred in a serial fashion. If this field is set to 2'b01, then the command opcode, command address, command dummy bytes and command data will all be transferred in parallel using DQ0 and DQ1 pins. If this field is set to 2'b10, then the command opcode, command address, command dummy bytes and command data will all be transferred in parallel using DQ0, DQ1, DQ2 and DQ3 pins.

 RW 0x0
23 enrddata

If enabled, the command specified in the command opcode field (bits 31:24) requires read data bytes to be received from the device.

Value Description
0x1 Command Requires read data
0x0 No Action
RW 0x0
22:20 numrddatabytes

Up to 8 data bytes may be read using this command. Set to 0 for 1 byte and 7 for 8 bytes.

Value Description
0x0 Read 1 Byte
0x1 Read 2 Byte
0x2 Read 3 Byte
0x3 Read 4 Byte
0x4 Read 5 Byte
0x5 Read 6 Byte
0x6 Read 7 Byte
0x7 Read 8 Byte
RW 0x0
19 encmdaddr

If enabled, the command specified in bits 31:24 requires an address. This should be setup before triggering the command via writing a 1 to the execute field.

Value Description
0x1 Command in bits 31:24 requires address
0x0 No Action
RW 0x0
18 enmodebit

Set to 1 to ensure the mode bits as defined in the Mode Bit Configuration register are sent following the address bytes.

Value Description
0x1 Mode Bit follows address bytes
0x0 No Action
RW 0x0
17:16 numaddrbytes

Set to the number of address bytes required (the address itself is programmed in the FLASH COMMAND ADDRESS REGISTERS). This should be setup before triggering the command via bit 0 of this register. 2'b00 : 1 address byte 2'b01 : 2 address bytes 2'b10 : 3 address bytes 2'b11 : 4 address bytes

Value Description
0x0 Write 1 Address Byte
0x1 Write 2 Address Bytes
0x2 Write 3 Address Bytes
0x3 Write 4 Address Bytes
RW 0x0
15 enwrdata

Set to 1 if the command specified in the command opcode field requires write data bytes to be sent to the device.

Value Description
0x1 Command requires write data bytes
0x0 No Action
RW 0x0
14:12 numwrdatabytes

Up to 8 Data bytes may be written using this command.

Value Description
0x0 Write 1 Byte
0x1 Write 2 Byte
0x2 Write 3 Byte
0x3 Write 4 Byte
0x4 Write 5 Byte
0x5 Write 6 Byte
0x6 Write 7 Byte
0x7 Write 8 Byte
RW 0x0
11:7 numdummybytes

Set to the number of dummy bytes required This should be setup before triggering the command via the execute field of this register.

 RW 0x0
1 cmdexecstat

Command execution in progress.

Value Description
0x1 Command Execution Status
0x0 No Action
RO 0x0
0 execcmd

Execute the command.

Value Description
0x1 Execute Command
0x0 No Action
RW 0x0