Target_Time_Seconds
The Target Time Seconds register, along with Target Time Nanoseconds
register, is used to schedule an interrupt event (Register 458[1] when Advanced Timestamping is enabled; otherwise, TS interrupt bit in Register14[9]) when the system time exceeds the
value programmed in these registers.
| Module Instance | Base Address | Register Address |
|---|---|---|
| emac0 | 0xFF700000 | 0xFF70071C |
| emac1 | 0xFF702000 | 0xFF70271C |
Offset: 0x71C
Access: RW
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
tstr RW 0x0 |
|||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
tstr RW 0x0 |
|||||||||||||||
Target_Time_Seconds Fields
| Bit | Name | Description | Access | Reset |
|---|---|---|---|---|
| 31:0 | tstr | This register stores the time in seconds. When the timestamp value matches or exceeds both Target Timestamp registers, then based on Bits [6:5] of Register 459 (PPS Control Register), the MAC starts or stops the PPS signal output and generates an interrupt (if enabled). |
RW | 0x0 |