hcsplt12

Channel_number 1
Module Instance Base Address Register Address
usb0 0xFFB00000 0xFFB00684
usb1 0xFFB40000 0xFFB40684

Offset: 0x684

Access: RW

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

spltena

RW 0x0

Reserved

compsplt

RW 0x0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

xactpos

RW 0x0

hubaddr

RW 0x0

prtaddr

RW 0x0

hcsplt12 Fields

Bit Name Description Access Reset
31 spltena

The application sets this field to indicate that this channel is enabled to perform split transactions.

Value Description
0x0 Split not enabled
0x1 Split enabled
RW 0x0
16 compsplt

The application sets this field to request the OTG host to perform a complete split transaction.

Value Description
0x0 No split transaction
0x1 Split transaction
RW 0x0
15:14 xactpos

This field is used to determine whether to send all, first, middle, or last payloads with each OUT transaction.

Value Description
0x0 Mid. This is the middle payload of this transaction (which is larger than 188 bytes)
0x1 End. This is the last payload of this transaction (which is larger than 188 bytes)
0x2 Begin. This is the first data payload of this transaction (which is larger than 188 bytes)
0x3 All. This is the entire data payload is of this transaction (which is less than or equal to 188 bytes)
RW 0x0
13:7 hubaddr

This field holds the device address of the transaction translator's hub.

 RW 0x0
6:0 prtaddr

This field is the port number of the recipient transactiontranslator.

 RW 0x0