LWHPS2FPGA AXI Bridge Module Address Map

Registers in the LWHPS2FPGA AXI Bridge Module.

Base Address: 0xFF400000

ID Register Group

Register Offset Width Access Reset Value Description
periph_id_4 0x1FD0 32 RO 0x4 Peripheral ID4 Register
periph_id_0 0x1FE0 32 RO 0x1 Peripheral ID0 Register
periph_id_1 0x1FE4 32 RO 0xB3 Peripheral ID1 Register
periph_id_2 0x1FE8 32 RO 0x6B Peripheral ID2 Register
periph_id_3 0x1FEC 32 RO 0x0 Peripheral ID3 Register
comp_id_0 0x1FF0 32 RO 0xD Component ID0 Register
comp_id_1 0x1FF4 32 RO 0xF0 Component ID1 Register
comp_id_2 0x1FF8 32 RO 0x5 Component ID2 Register
comp_id_3 0x1FFC 32 RO 0xB1 Component ID3 Register

FPGA2HPS AXI Bridge Registers

Register Offset Width Access Reset Value Description
fn_mod_bm_iss 0x2008 32 RW 0x0 Bus Matrix Issuing Functionality Modification Register
ahb_cntl 0x2044 32 RW 0x0 AHB Control Register

HPS2FPGA AXI Bridge Registers

Register Offset Width Access Reset Value Description
fn_mod_bm_iss 0x3008 32 RW 0x0 Bus Matrix Issuing Functionality Modification Register
ahb_cntl 0x3044 32 RW 0x0 AHB Control Register

32-bit Master

Register Offset Width Access Reset Value Description
fn_mod_bm_iss 0x5008 32 RW 0x0 Bus Matrix Issuing Functionality Modification Register
wr_tidemark 0x5040 32 RW 0x4 Write Tidemark
fn_mod 0x5108 32 RW 0x0 Issuing Functionality Modification Register

L3 Slave Register Group

Register Offset Width Access Reset Value Description
fn_mod 0x45108 32 RW 0x0 Issuing Functionality Modification Register