Freeze Control Group Register Descriptions Registers used to generate HPS IO freeze signals. All registers are only reset by a cold reset (ignore warm reset). Offset: 0x40 vioctrl Used to drive freeze signals to HPS VIO banks. The register array index corresponds to the freeze channel. Freeze channel 0 provides freeze signals to VIO bank 0 and 1. Freeze channel 1 provides freeze signals to VIO bank 2 and 3. Only drives freeze signals when SRC.VIO1 is set to SW. Freeze channel 2 provides freeze signals to VIO bank 4. All fields are only reset by a cold reset (ignore warm reset). The following equation determines when the weak pullup resistor is enabled: enabled = ~wkpullup | (CFF & cfg & tristate) where CFF is the value of weak pullup as set by IO configuration hioctrl Used to drive freeze signals to HPS HIO bank (DDR SDRAM). All fields are only reset by a cold reset (ignore warm reset). The following equation determines when the weak pullup resistor is enabled: enabled = ~wkpullup | (CFF & cfg & tristate) where CFF is the value of weak pullup as set by IO configuration src Contains register field to choose between software state machine (vioctrl array index [1] register) or hardware state machine in the Freeze Controller as the freeze signal source for VIO channel 1. All fields are only reset by a cold reset (ignore warm reset). hwctrl Activate freeze or thaw operations on VIO channel 1 (HPS IO bank 2 and bank 3) and monitor for completeness and the current state. These fields interact with the hardware state machine in the Freeze Controller. These fields can be accessed independent of the value of SRC1.VIO1 although they only have an effect on the VIO channel 1 freeze signals when SRC1.VIO1 is setup to have the hardware state machine be the freeze signal source. All fields are only reset by a cold reset (ignore warm reset).