L3 (NIC-301) GPV Registers Address Map
Registers to control L3 interconnect settings
Base Address: 0xFF800000
L3 (NIC-301) GPV Registers
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
remap | 0x0 | 32 | WO | 0x0 | Remap |
Security Register Group
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
l4main | 0x8 | 32 | WO | 0x0 | L4 main peripherals security |
l4sp | 0xC | 32 | WO | 0x0 | L4 SP Peripherals Security |
l4mp | 0x10 | 32 | WO | 0x0 | L4 MP Peripherals Security |
l4osc1 | 0x14 | 32 | WO | 0x0 | L4 OSC1 Peripherals Security |
l4spim | 0x18 | 32 | WO | 0x0 | L4 SPIM Peripherals Security |
stm | 0x1C | 32 | WO | 0x0 | STM Peripheral Security |
lwhps2fpgaregs | 0x20 | 32 | WO | 0x0 | LWHPS2FPGA AXI Bridge Registers Peripheral Security |
usb1 | 0x28 | 32 | WO | 0x0 | USB1 Registers Peripheral Security |
nanddata | 0x2C | 32 | WO | 0x0 | NAND Flash Controller Data Peripheral Security |
usb0 | 0x80 | 32 | WO | 0x0 | USB0 Registers Peripheral Security |
nandregs | 0x84 | 32 | WO | 0x0 | NAND Flash Controller Registers Peripheral Security |
qspidata | 0x88 | 32 | WO | 0x0 | QSPI Flash Controller Data Peripheral Security |
fpgamgrdata | 0x8C | 32 | WO | 0x0 | FPGA Manager Data Peripheral Security |
hps2fpgaregs | 0x90 | 32 | WO | 0x0 | HPS2FPGA AXI Bridge Registers Peripheral Security |
acp | 0x94 | 32 | WO | 0x0 | MPU ACP Peripheral Security |
rom | 0x98 | 32 | WO | 0x0 | ROM Peripheral Security |
ocram | 0x9C | 32 | WO | 0x0 | On-chip RAM Peripheral Security |
sdrdata | 0xA0 | 32 | WO | 0x0 | SDRAM Data Peripheral Security |
ID Register Group
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
periph_id_4 | 0x1FD0 | 32 | RO | 0x4 | Peripheral ID4 Register |
periph_id_0 | 0x1FE0 | 32 | RO | 0x1 | Peripheral ID0 Register |
periph_id_1 | 0x1FE4 | 32 | RO | 0xB3 | Peripheral ID1 Register |
periph_id_2 | 0x1FE8 | 32 | RO | 0x6B | Peripheral ID2 Register |
periph_id_3 | 0x1FEC | 32 | RO | 0x0 | Peripheral ID3 Register |
comp_id_0 | 0x1FF0 | 32 | RO | 0xD | Component ID0 Register |
comp_id_1 | 0x1FF4 | 32 | RO | 0xF0 | Component ID1 Register |
comp_id_2 | 0x1FF8 | 32 | RO | 0x5 | Component ID2 Register |
comp_id_3 | 0x1FFC | 32 | RO | 0xB1 | Component ID3 Register |
L4 MAIN
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
fn_mod_bm_iss | 0x2008 | 32 | RW | 0x0 | Bus Matrix Issuing Functionality Modification Register |
L4 SP
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
fn_mod_bm_iss | 0x3008 | 32 | RW | 0x0 | Bus Matrix Issuing Functionality Modification Register |
L4 MP
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
fn_mod_bm_iss | 0x4008 | 32 | RW | 0x0 | Bus Matrix Issuing Functionality Modification Register |
L4 OSC1
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
fn_mod_bm_iss | 0x5008 | 32 | RW | 0x0 | Bus Matrix Issuing Functionality Modification Register |
L4 SPIM
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
fn_mod_bm_iss | 0x6008 | 32 | RW | 0x0 | Bus Matrix Issuing Functionality Modification Register |
STM
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
fn_mod_bm_iss | 0x7008 | 32 | RW | 0x0 | Bus Matrix Issuing Functionality Modification Register |
fn_mod | 0x7108 | 32 | RW | 0x0 | Issuing Functionality Modification Register |
LWHPS2FPGA
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
fn_mod_bm_iss | 0x8008 | 32 | RW | 0x0 | Bus Matrix Issuing Functionality Modification Register |
fn_mod | 0x8108 | 32 | RW | 0x0 | Issuing Functionality Modification Register |
USB1
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
fn_mod_bm_iss | 0xA008 | 32 | RW | 0x0 | Bus Matrix Issuing Functionality Modification Register |
ahb_cntl | 0xA044 | 32 | RW | 0x0 | AHB Control Register |
NANDDATA
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
fn_mod_bm_iss | 0xB008 | 32 | RW | 0x0 | Bus Matrix Issuing Functionality Modification Register |
fn_mod | 0xB108 | 32 | RW | 0x0 | Issuing Functionality Modification Register |
USB0
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
fn_mod_bm_iss | 0x20008 | 32 | RW | 0x0 | Bus Matrix Issuing Functionality Modification Register |
ahb_cntl | 0x20044 | 32 | RW | 0x0 | AHB Control Register |
NANDREGS
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
fn_mod_bm_iss | 0x21008 | 32 | RW | 0x0 | Bus Matrix Issuing Functionality Modification Register |
fn_mod | 0x21108 | 32 | RW | 0x0 | Issuing Functionality Modification Register |
QSPIDATA
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
fn_mod_bm_iss | 0x22008 | 32 | RW | 0x0 | Bus Matrix Issuing Functionality Modification Register |
ahb_cntl | 0x22044 | 32 | RW | 0x0 | AHB Control Register |
FPGAMGRDATA
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
fn_mod_bm_iss | 0x23008 | 32 | RW | 0x0 | Bus Matrix Issuing Functionality Modification Register |
wr_tidemark | 0x23040 | 32 | RW | 0x4 | Write Tidemark |
fn_mod | 0x23108 | 32 | RW | 0x0 | Issuing Functionality Modification Register |
HPS2FPGA
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
fn_mod_bm_iss | 0x24008 | 32 | RW | 0x0 | Bus Matrix Issuing Functionality Modification Register |
wr_tidemark | 0x24040 | 32 | RW | 0x4 | Write Tidemark |
fn_mod | 0x24108 | 32 | RW | 0x0 | Issuing Functionality Modification Register |
ACP
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
fn_mod_bm_iss | 0x25008 | 32 | RW | 0x0 | Bus Matrix Issuing Functionality Modification Register |
fn_mod | 0x25108 | 32 | RW | 0x0 | Issuing Functionality Modification Register |
Boot ROM
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
fn_mod_bm_iss | 0x26008 | 32 | RW | 0x0 | Bus Matrix Issuing Functionality Modification Register |
fn_mod | 0x26108 | 32 | RW | 0x0 | Issuing Functionality Modification Register |
On-chip RAM
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
fn_mod_bm_iss | 0x27008 | 32 | RW | 0x0 | Bus Matrix Issuing Functionality Modification Register |
wr_tidemark | 0x27040 | 32 | RW | 0x4 | Write Tidemark |
fn_mod | 0x27108 | 32 | RW | 0x0 | Issuing Functionality Modification Register |
DAP
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
fn_mod2 | 0x42024 | 32 | RW | 0x0 | Functionality Modification 2 Register |
fn_mod_ahb | 0x42028 | 32 | RW | 0x0 | Functionality Modification AHB Register |
read_qos | 0x42100 | 32 | RW | 0x0 | Read Channel QoS Value |
write_qos | 0x42104 | 32 | RW | 0x0 | Write Channel QoS Value |
fn_mod | 0x42108 | 32 | RW | 0x0 | Issuing Functionality Modification Register |
MPU
SDMMC
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
fn_mod_ahb | 0x44028 | 32 | RW | 0x0 | Functionality Modification AHB Register |
read_qos | 0x44100 | 32 | RW | 0x0 | Read Channel QoS Value |
write_qos | 0x44104 | 32 | RW | 0x0 | Write Channel QoS Value |
fn_mod | 0x44108 | 32 | RW | 0x0 | Issuing Functionality Modification Register |
DMA
FPGA2HPS
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
wr_tidemark | 0x46040 | 32 | RW | 0x4 | Write Tidemark |
read_qos | 0x46100 | 32 | RW | 0x0 | Read Channel QoS Value |
write_qos | 0x46104 | 32 | RW | 0x0 | Write Channel QoS Value |
fn_mod | 0x46108 | 32 | RW | 0x0 | Issuing Functionality Modification Register |
ETR
EMAC0
EMAC1
USB0
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
fn_mod_ahb | 0x4A028 | 32 | RW | 0x0 | Functionality Modification AHB Register |
read_qos | 0x4A100 | 32 | RW | 0x0 | Read Channel QoS Value |
write_qos | 0x4A104 | 32 | RW | 0x0 | Write Channel QoS Value |
fn_mod | 0x4A108 | 32 | RW | 0x0 | Issuing Functionality Modification Register |
NAND
USB1
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
fn_mod_ahb | 0x4C028 | 32 | RW | 0x0 | Functionality Modification AHB Register |
read_qos | 0x4C100 | 32 | RW | 0x0 | Read Channel QoS Value |
write_qos | 0x4C104 | 32 | RW | 0x0 | Write Channel QoS Value |
fn_mod | 0x4C108 | 32 | RW | 0x0 | Issuing Functionality Modification Register |