clkena

Controls external SD/MMC Clock Enable.
Module Instance Base Address Register Address
sdmmc 0xFF704000 0xFF704010

Offset: 0x10

Access: RW

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

cclk_low_power

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

cclk_enable

RW 0x0

clkena Fields

Bit Name Description Access Reset
16 cclk_low_power

In low-power mode, stop sdmmc_cclk_out when card in IDLE (should be normally set to only MMC and SD memory cards; for SDIO cards, if interrupts must be detected, clock should not be stopped).

Value Description
0x0 Non-low-power mode
0x1 Low-power mode
RW 0x0
0 cclk_enable

Enables sdmmc_cclk_out.

Value Description
0x0 SD/MMC Disable
0x1 SD/MMC Enable
RW 0x0