counts
The COUNTS register is used by software to control reset behavior.It includes fields for software to control the behavior of the warm reset and nRST pin.
Fields are only reset by a cold reset.
| Module Instance | Base Address | Register Address |
|---|---|---|
| rstmgr | 0xFFD05000 | 0xFFD05008 |
Offset: 0x8
Access: RW
Important: To prevent indeterminate
system behavior, reserved areas of memory must not be accessed by software or
hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reserved |
nrstcnt RW 0x800 |
||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
nrstcnt RW 0x800 |
warmrstcycles RW 0x80 |
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counts Fields
| Bit | Name | Description | Access | Reset |
|---|---|---|---|---|
| 27:8 | nrstcnt | The Reset Manager pulls down the nRST pin on a cold or warm reset for the number of cycles specified in this register. A value of 0x0 prevents the Reset Manager from pulling down the nRST pin. |
RW | 0x800 |
| 7:0 | warmrstcycles | On a warm reset, the Reset Manager releases the reset to the Clock Manager, and then waits for the number of cycles specified in this register before releasing the rest of the hardware controlled resets. Value must be greater than 16. |
RW | 0x80 |