l4spim
Controls security settings for L4 SPIM peripherals.
Module Instance | Base Address | Register Address |
---|---|---|
l3regs | 0xFF800000 | 0xFF800018 |
Offset: 0x18
Access: WO
Important: To prevent indeterminate
system behavior, reserved areas of memory must not be accessed by software or
hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
Bit Fields | |||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reserved |
|||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved |
scanmgr WO 0x0 |
spim1 WO 0x0 |
spim0 WO 0x0 |
l4spim Fields
Bit | Name | Description | Access | Reset | ||||||
---|---|---|---|---|---|---|---|---|---|---|
2 | scanmgr | Controls whether secure or non-secure masters can access the Scan Manager slave.
|
WO | 0x0 | ||||||
1 | spim1 | Controls whether secure or non-secure masters can access the SPI Master 1 slave.
|
WO | 0x0 | ||||||
0 | spim0 | Controls whether secure or non-secure masters can access the SPI Master 0 slave.
|
WO | 0x0 |