lcr

Formats serial data.
Module Instance Base Address Register Address
uart0 0xFFC02000 0xFFC0200C
uart1 0xFFC03000 0xFFC0300C

Offset: 0xC

Access: RW

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

dlab

RW 0x0

break

RW 0x0

Reserved

eps

RW 0x0

pen

RW 0x0

stop

RW 0x0

dls

RW 0x0

lcr Fields

Bit Name Description Access Reset
7 dlab

Used to enable reading and writing of the Divisor Latch register (DLL and DLH) to set the baud rate of the UART. This bit must be cleared after initial baud rate setup in order to access other registers.

 RW 0x0
6 break

This is used to cause a break condition to be transmitted to the receiving device. If set to one the serial output is forced to the spacing (logic 0) state. When not in Loopback Mode, as determined by MCR[4], the sout line is forced low until the Break bit is cleared. When in Loopback Mode, the break condition is internally looped back to the receiver and the sir_out_n line is forced low.

 RW 0x0
4 eps

This is used to select between even and odd parity, when parity is enabled (PEN set to one). If set to one, an even number of logic '1's is transmitted or checked. If set to zero, an odd number of logic '1's is transmitted or checked.

Value Description
0x0 odd parity
0x1 even parity
RW 0x0
3 pen

This bit is used to enable and disable parity generation and detection in a transmitted and received data character.

Value Description
0x0 parity disabled
0x1 parity enabled
RW 0x0
2 stop

Number of stop bits. Used to select the number of stop bits per character that the peripheral will transmit and receive.Note that regardless of the number of stop bits selected the receiver will only check the first stop bit.

Value Description
0x0 one stop bit
0x1 1.5 stop bits when DLS (LCR[1:0]) is zero
RW 0x0
1:0 dls

Data Length Select.Selects the number of data bits per character that the peripheral will transmit and receive.

Value Description
0x0 5 bits
0x1 6 bits
0x2 7 bits
0x3 8 bits
RW 0x0