Timestamp_Status

Timestamp status. All bits except Bits[27:25] get cleared when the host reads this register.

Module Instance	Base Address	Register Address
`emac0`	`0xFF700000`	`0xFF700728`
`emac1`	`0xFF702000`	`0xFF702728`

Offset: 0x728

Access: RO

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.

Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`Reserved`		`atsns` `RO 0x0`					`atsstm` `RO 0x0`	`Reserved`				`atsstn` `RO 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`Reserved`												`tstrgterr` `RO 0x0`	`auxtstrig` `RO 0x0`	`tstargt` `RO 0x0`	`tssovf` `RO 0x0`

Timestamp_Status Fields

Bit

Name

Description

Access

Reset

29:25

atsns

This field indicates the number of Snapshots available in the FIFO. A value of 16 (equal to the depth of the FIFO) indicates that the Auxiliary Snapshot FIFO is full. These bits are cleared (to 00000) when the Auxiliary snapshot FIFO clear bit is set.

RO

0x0

atsstm

This bit is set when the Auxiliary timestamp snapshot FIFO is full and external trigger was set. This indicates that the latest snapshot is not stored in the FIFO.

Value	Description
0x0	Not Active
0x1	Aux timestamp snapshot full

RO

0x0

19:16

atsstn

These bits identify the Auxiliary trigger inputs for which the timestamp available in the Auxiliary Snapshot Register is applicable. When more than one bit is set at the same time, it means that corresponding auxiliary triggers were sampled at the same clock. These bits are applicable only if the number of Auxiliary snapshots is more than one. One bit is assigned for each trigger as shown in the following list: * Bit 16: Auxiliary trigger 0 * Bit 17: Auxiliary trigger 1 * Bit 18: Auxiliary trigger 2 * Bit 19: Auxiliary trigger 3 The software can read this register to find the triggers that are set when the timestamp is taken.

RO

0x0

tstrgterr

This bit is set when the target time, being programmed in Target Time Registers, is already elapsed. This bit is cleared when read by the application.

Value	Description
0x0	When Read resets
0x1	Target Time Elapsed -Reg455 and Reg456

RO

0x0

auxtstrig

This bit is set high when the auxiliary snapshot is written to the FIFO.

Value	Description
0x0	System Time
0x1	System Time is >= Reg455 and Reg456

RO

0x0

tstargt

When set, this bit indicates that the value of system time is greater or equal to the value specified in the Register 455 (Target Time Seconds Register) and Register 456 (Target Time Nanoseconds Register).

Value	Description
0x0	System Time
0x1	System Time is >= Reg455 and Reg456

RO

0x0

tssovf

When set, this bit indicates that the seconds value of the timestamp (when supporting version 2 format) has overflowed beyond 32'hFFFF_FFFF.

Value	Description
0x0	No Overflow
0x1	Seconds Overflow

RO

0x0