gpio_swporta_dr
This GPIO Data register is used to output data
on the GPIO signals. Check the GPIO chapter in the handbook for details on how GPIO2
is implemented.
| Module Instance | Base Address | Register Address |
|---|---|---|
| gpio0 | 0xFF708000 | 0xFF708000 |
| gpio1 | 0xFF709000 | 0xFF709000 |
| gpio2 | 0xFF70A000 | 0xFF70A000 |
Offset: 0x0
Access: RW
Important: To prevent indeterminate
system behavior, reserved areas of memory must not be accessed by software or
hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reserved |
gpio_swporta_dr RW 0x0 |
||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
gpio_swporta_dr RW 0x0 |
|||||||||||||||
gpio_swporta_dr Fields
| Bit | Name | Description | Access | Reset |
|---|---|---|---|---|
| 28:0 | gpio_swporta_dr | Values written to this register are output on the I/O signals of the GPIO Data Register, if the corresponding data direction bits for GPIO Data Direction Field are set to Output mode. The value read back is equal to the last value written to this register. Note that only bits[26:0] are implemented for gpio2. |
RW | 0x0 |