ECCCorInfo_b01

ECC Error correction Information register. Controller updates this register when it completes a transaction. The values are held in this register till a new transaction completes.

Module Instance	Base Address	Register Address
`nandregs`	`0xFFB80000`	`0xFFB80650`

Offset: 0x650

Access: RO

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.

Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`Reserved`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`uncor_err_b1` `RO 0x0`	`max_errors_b1` `RO 0x0`							`uncor_err_b0` `RO 0x0`	`max_errors_b0` `RO 0x0`

ECCCorInfo_b01 Fields

Bit	Name	Description	Access	Reset
15	`uncor_err_b1`	Uncorrectable error occurred while reading pages for last transaction in Bank1. Uncorrectable errors also generate interrupts in intr_statusx register.	`RO`	`0x0`
14:8	`max_errors_b1`	Maximum of number of errors corrected per sector in Bank1. This field is not valid for uncorrectable errors. A value of zero indicates that no ECC error occurred in last completed transaction.	`RO`	`0x0`
7	`uncor_err_b0`	Uncorrectable error occurred while reading pages for last transaction in Bank0. Uncorrectable errors also generate interrupts in intr_statusx register.	`RO`	`0x0`
6:0	`max_errors_b0`	Maximum of number of errors corrected per sector in Bank0. This field is not valid for uncorrectable errors. A value of zero indicates that no ECC error occurred in last completed transaction.	`RO`	`0x0`