MMC_Receive_Interrupt

The MMC Receive Interrupt register maintains the interrupts that are generated when the following happens: * Receive statistic counters reach half of their maximum values (0x8000_0000 for 32-bit counter and 0x8000 for 16-bit counter). * Receive statistic counters cross their maximum values (0xFFFF_FFFF for 32-bit counter and 0xFFFF for 16-bit counter). When the Counter Stop Rollover is set, then interrupts are set but the counter remains at all-ones. The MMC Receive Interrupt register is a 32-bit wide register. An interrupt bit is cleared when the respective MMC counter that caused the interrupt is read. The least significant byte lane (Bits[7:0]) of the respective counter must be read in order to clear the interrupt bit.
Module Instance Base Address Register Address
emac0 0xFF700000 0xFF700104
emac1 0xFF702000 0xFF702104

Offset: 0x104

Access: RO

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by software or hardware. Any area of the memory map that is not explicitly defined as a register space or accessible memory is considered reserved.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

rxctrlfis

RO 0x0

rxrcverrfis

RO 0x0

rxwdogfis

RO 0x0

rxvlangbfis

RO 0x0

rxfovfis

RO 0x0

rxpausfis

RO 0x0

rxorangefis

RO 0x0

rxlenerfis

RO 0x0

rxucgfis

RO 0x0

rx1024tmaxoctgbfis

RO 0x0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

rx512t1023octgbfis

RO 0x0

rx256t511octgbfis

RO 0x0

rx128t255octgbfis

RO 0x0

rx65t127octgbfis

RO 0x0

rx64octgbfis

RO 0x0

rxosizegfis

RO 0x0

rxusizegfis

RO 0x0

rxjaberfis

RO 0x0

rxruntfis

RO 0x0

rxalgnerfis

RO 0x0

rxcrcerfis

RO 0x0

rxmcgfis

RO 0x0

rxbcgfis

RO 0x0

rxgoctis

RO 0x0

rxgboctis

RO 0x0

rxgbfrmis

RO 0x0

MMC_Receive_Interrupt Fields

Bit Name Description Access Reset
25 rxctrlfis

This bit is set when the rxctrlframes_g counter reaches half of the maximum value or the maximum value.

 RO 0x0
24 rxrcverrfis

This bit is set when the rxrcverror counter reaches half of the maximum value or the maximum value.

 RO 0x0
23 rxwdogfis

This bit is set when the rxwatchdogerror counter reaches half of the maximum value or the maximum value.

Value Description
0x0 rxwatchdogerror < half max
0x1 rxwatchdogerror >= half max
RO 0x0
22 rxvlangbfis

This bit is set when the rxvlanframes_gb counter reaches half of the maximum value or the maximum value.

Value Description
0x0 rxvlanframes_gb < half max
0x1 rxvlanframes_gb >= half max
RO 0x0
21 rxfovfis

This bit is set when the rxfifooverflow counter reaches half of the maximum value or the maximum value.

Value Description
0x0 rxfifooverflow < half max
0x1 rxfifooverflow >= half max
RO 0x0
20 rxpausfis

This bit is set when the rxpauseframe counter reaches half of the maximum value or the maximum value.

Value Description
0x0 rxpauseframe < half max
0x1 rxpauseframe >= half max
RO 0x0
19 rxorangefis

This bit is set when the rxoutofrangetype counter reaches half of the maximum value or the maximum value.

Value Description
0x0 rxoutofrangetype < half max
0x1 rxoutofrangetype >= half max
RO 0x0
18 rxlenerfis

This bit is set when the rxlengtherror counter reaches half of the maximum value or the maximum value.

Value Description
0x0 rxlengtherror < half max
0x1 rxlengtherror >= half max
RO 0x0
17 rxucgfis

This bit is set when the rxunicastframes_gb counter reaches half of the maximum value or the maximum value.

Value Description
0x0 rx1024tomaxoctets_gb < half max
0x1 rx1024tomaxoctets_gb >= half max
RO 0x0
16 rx1024tmaxoctgbfis

This bit is set when the rx1024tomaxoctets_gb counter reaches half of the maximum value or the maximum value.

Value Description
0x0 rx1024tomaxoctets_gb < half max
0x1 rx1024tomaxoctets_gb >= half max
RO 0x0
15 rx512t1023octgbfis

This bit is set when the rx512to1023octets_gb counter reaches half of the maximum value or the maximum value.

Value Description
0x0 rx512to1023octets_gb < half max
0x1 rx512to1023octets_gb >= half max
RO 0x0
14 rx256t511octgbfis

This bit is set when the rx256to511octets_gb counter reaches half of the maximum value or the maximum value.

Value Description
0x0 rx256to511octets_gb < half max
0x1 rx256to511octets_gb >= half max
RO 0x0
13 rx128t255octgbfis

This bit is set when the rx128to255octets_gb counter reaches half of the maximum value or the maximum value.

Value Description
0x0 rx128to255octets_gb < half max
0x1 rx128to255octets_gb >= half max
RO 0x0
12 rx65t127octgbfis

This is set when the rx65to127octets_gb counter reaches half of the maximum value or the maximum value.

Value Description
0x0 rx65to127octets_gb < half max
0x1 rx65to127octets_gb >= half max
RO 0x0
11 rx64octgbfis

This bit is set when the rx64octets_gb counter reaches half of the maximum value or the maximum value.

Value Description
0x0 rx64octets_gb < half max
0x1 rx64octets_gb >= half max
RO 0x0
10 rxosizegfis

This bit is set when the rxoversize_g counter reaches half of the maximum value or the maximum value.

Value Description
0x0 rxoversize_g < half max
0x1 rxoversize_g >= half max
RO 0x0
9 rxusizegfis

This bit is set when the rxundersize_g counter reaches half of the maximum value or the maximum value.

Value Description
0x0 rxundersize_g < half max
0x1 rxundersize_g >= half max
RO 0x0
8 rxjaberfis

This bit is set when the rxjabbererror counter reaches half of the maximum value or the maximum value.

Value Description
0x0 rxjabbererror < half max
0x1 rxjabbererror >= half max
RO 0x0
7 rxruntfis

This bit is set when the rxrunterror counter reaches half of the maximum value or the maximum value.

Value Description
0x0 rxrunterror < half max
0x1 rxrunterror >= half max
RO 0x0
6 rxalgnerfis

This bit is set when the rxalignmenterror counter reaches half of the maximum value or the maximum value.

Value Description
0x0 rxalignmenterror < half max
0x1 rxalignmenterror >= half max
RO 0x0
5 rxcrcerfis

This bit is set when the rxcrcerror counter reaches half of the maximum value or the maximum value.

Value Description
0x0 rxcrcerror < half max
0x1 rxcrcerror >= half max
RO 0x0
4 rxmcgfis

This bit is set when the rxmulticastframes_g counter reaches half of the maximum value or the maximum value.

Value Description
0x0 rxbroadcastframes_g < half max
0x1 rxbroadcastframes_g >= half max
RO 0x0
3 rxbcgfis

This bit is set when the rxbroadcastframes_g counter reaches half of the maximum value or the maximum value.

 RO 0x0
2 rxgoctis

This bit is set when the rxoctetcount_g counter reaches half of the maximum value or the maximum value.

Value Description
0x0 Rxoctetcount_g < half max
0x1 Rxoctetcount_g >= half max
RO 0x0
1 rxgboctis

This bit is set when the rxoctetcount_bg counter reaches half of the maximum value or the maximum value.

Value Description
0x0 Rxoctetcount_bg < half max
0x1 Rxoctetcount_bg >= half max
RO 0x0
0 rxgbfrmis

This bit is set when the rxframecount_bg counter reaches half of the maximum value or the maximum value.

Value Description
0x0 Preset All Counters to almost-half
0x1 Present All Counters almost-full
RO 0x0