Hard Processor System Technical Reference Manual: Agilex™ 5 SoCs

ID 814346
Date 7/19/2024
Public
Document Table of Contents

5.8.5.1. Interface to HPS I/O

The following figure shows the I3C controller I/O interface signal.

Figure 185. I3C I/O Interface Signal

The following table shows the I3C controller HPS I/O interface.

Table 245.  I3C Controller HPS I/O Interface
Signal Name Signal Width Direction Description
i3c<#>_sda 1 Bidirectional

Serial Data

i3c<#>_scl

1 Bidirectional

Serial Clock

i3c<#>_sda_pullup_en 25 1 Single

SDA Open-Drain Pull-Up Signal

Applicable only in master mode of operation. This signal enables the pull-up resistor or equivalent current source in open-drain mode when the controller requires to drive '1' on the SCL line.

25 The i3c<#>_sda_pullup_en pin is supported on production devices only, not on ES devices.