Hard Processor System Technical Reference Manual: Agilex™ 5 SoCs

ID 814346
Date 7/19/2024
Public
Document Table of Contents

4.1.5.4. Addressing and Memory Regions

CCU address map is categorized into three main spaces:

  • Ncore register space (NRS)
  • General-purpose address space (GPAS)
  • Boot region (BR)

Each space may contain one or more address regions.

Address decoding is priority based. NRS has the highest priority followed by general purpose address space and lastly boot address space. If an access matches higher priority address space, then lower priority address space matches are ignored, and the higher priority space is selected for access. Within an address space multiple address region matches are treated as errors; this specifically applies to general purpose address space. An access results in an error if multiple address region matches are detected within a single address space or no matches are detected to any address space.

The CCU system address map configuration for Agilex™ 5 is defined according to the following table.

Table 72.  CCU Address Map
Area Start Address Offset
Ncore register space 0x00_1C00_0000 0x0
Boot region 0x0 0x0
DDR channels Configurable through CSR Configurable through CSR
Note: The DDR channel address space mapping must be configured by initialization software before accesses to SDRAM are attempted. The required configuration for single or dual/multiple channel SDRAM support is described in General Purpose Address Space.