Hard Processor System Technical Reference Manual: Agilex™ 5 SoCs

ID 814346
Date 7/19/2024
Public
Document Table of Contents

4.3.6.2. Functional Blocks

The MMU-600 has the following key components:

Translation Buffer Unit (TBU)

The TBU contains a Translation Look-aside Buffer (TLB) that caches page tables. The MMU-600 implements a TBU for each connected manager, and a TBU can be implemented so that it is local to the manager rather than local to the MMU-600.

The following figure shows a block diagram of the MMU-600 TBU:

Figure 38. TBU Architecture Overview

Translation Control Unit (TCU)

The TCU controls and manages the address translations. The MMU-600 implements a single TCU.

Figure 39. TCU Architecture Overview

Interconnect

Multiple TBUs communicate to the TCU via the Distributed Translation Interface (DTI) which is implemented on top of a bi-directional AXI streaming interface.

Note: The diagram indicates the presence of LPI (Q-Channel). The Agilex™ 5 SMMU does not include the LPI interfaces.