Hard Processor System Technical Reference Manual: Agilex™ 5 SoCs

ID 814346
Date 7/19/2024
Public
Document Table of Contents

15. CoreSight Debug and Trace

CoreSight* systems provide all the infrastructure you require to debug, monitor, and optimize the performance of a complete HPS design. CoreSight technology addresses the requirement for a multi-core debug and trace solution with high bandwidth for whole systems beyond the processor core.

The hard processor system (HPS) infrastructure provides visibility and control of the HPS modules, the Arm* Cortex* -A76 and Arm* Cortex* -A55 processors, and user logic implemented in the FPGA fabric. The debug system design incorporates Arm* CoreSight* components.