Visible to Intel only — GUID: fen1679133691615
Ixiasoft
Visible to Intel only — GUID: fen1679133691615
Ixiasoft
14.6.6.2. Double-Bit Error Interrupt
All double-bit errors generate interrupts and the error memory address is logged into the recent double-bit error (DERRADDRx ) register.
The Interrupt Status (INTSTAT) register indicates if a double-bit error has occurred. The double-bit error interrupt generation cannot be disabled. The interrupt is de-asserted by writing to the double-bit error pending bit of the INTSTAT register.
Double-bit errors that occur during a read-modify-write cycle for a sub-word access are flagged in the MODSTAT register in addition to triggering an interrupt.