Hard Processor System Technical Reference Manual: Agilex™ 5 SoCs

ID 814346
Date 7/19/2024
Public
Document Table of Contents

5.4.6.8. Command Queuing

Command queuing (CQ) is a feature available in the eMMC standard since version 5.1. It allows to issue multiple (up to 32) tasks by setting task doorbell register bits. Unless no errors appear during the transfer, the host can read commands from the task descriptors list using internal DMA and run operations.

The CQ engine runs all the operations sequentially in order the tasks were submitted. If the host is ready for task execution but the next task is not, it takes the first one ready to minimize idle time.

The execution order of the tasks considers tasks priority applied during task doorbell write and the device readiness for the task execution.

The command queuing is compliant with the eMMC standard. For more details, see the eMMC5.1 Standard, subsection Annex B Host Controller Interface for Command Queuing.