Hard Processor System Technical Reference Manual: Agilex™ 5 SoCs
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6.4.2. FPGA Interface Enables
The system manager can enable or disable interfaces between the FPGA and HPS.
You can program the FPGA interface enable registers (System_Mgr.sysmgr.fpgaintf_en_*) to enable/disable the following interfaces between the FPGA and HPS:
- Boundary scan interface
- Debug interface
- Trace interface
- System trace macrocell (STM) interface
- Cross-trigger interface (CTI)
- SPI master interface
- EMAC interfaces