Visible to Intel only — GUID: uup1708452599227
Ixiasoft
Visible to Intel only — GUID: uup1708452599227
Ixiasoft
8.7.5.2. HPS Boot First
If the HPS Boot First Mode has been selected, and after a POR, then the SDM will drive the HPS_COLD_nRESET signal to output low. At this point, referring to the Agilex™ 5 Configuration User Guide, the bitstream configuration file containing the FSBL must be resent to the SDM using the same interface that the MSEL[2:0] pins specified during POR. After the bitstream has been received, the SDM releases the HPS from reset, and the HPS_COLD_nRESET signal is configured as an input and can be pulled high by the external pull-up resister.
For HPS first configuration, the HPS application controls the time between CONF_DONE and INIT_DONE. The INIT_DONE signal does not assert until after the software running on the HPS such as U-Boot or the operating system (OS) initiates the configuration, the FPGA configures, and enters user mode. The following figures show the HPS boot first behavior.
If the HPS Boot First Mode has been selected, and after nCONFIG has been asserted, then the SDM will drive the HPS_COLD_nRESET signal to output low. After the bitstream has been received, the SDM releases the HPS from reset, and the HPS_COLD_nRESET signal is configured as an input and can be pulled high by the external pull-up resister.
For HPS first configuration, the HPS application controls the time between CONF_DONE and INIT_DONE. The INIT_DONE signal does not assert until after the software running on the HPS such as U-Boot or the operating system (OS) initiates the configuration, the FPGA configures, and enters user mode.