Hard Processor System Technical Reference Manual: Agilex™ 5 SoCs

ID 814346
Date 7/19/2024
Public
Document Table of Contents

13.4.4.10.1. Example: One Initiator Always Takes Precedence

In this example, one particular initiator’s packets always take precedence.

Consider a system that includes three initiators, A, B, and C. In this system, we require that initiator A always takes precedence over initiator B at each arbitration node, and initiator B always takes precedence over initiator C. To implement this arbitration scheme, we configure all QoS generators in fixed mode, and assign appropriate values for read and write urgency, as shown in the following table.

Table 395.  Fixed Example Settings
Initiator QoS Mode P1 (Read Urgency) P0 (Write Urgency)
A Fixed (mode 0) 0x3 0x3
B Fixed (mode 0) 0x2 0x2
C Fixed (mode 0) 0x1 0x1

In fixed mode, initiators by default have a read urgency of 1 and write urgency of 0. So initiator C has equal urgency for reads and higher urgency for writes compared to all the other initiators in the system.