Visible to Intel only — GUID: lim1674595469186
Ixiasoft
Visible to Intel only — GUID: lim1674595469186
Ixiasoft
7.2.3. DSU Power and Performance Trade-off
The operating frequency of the DSU clocks is controllable via software, allowing you to scale the operating frequency of the DSU to match the performance needs of the fastest CPU currently in use. This provides additional dynamic power savings when the cores are operating at a reduced frequency.
Software updates to ping-pong counter dividers have seamless transitions on output clocks. Therefore, software can dynamically change the frequency by changing the ping-pong counter value (integer divider), however, the input to the ping-pong counters cannot be changed dynamically.
No clock gating of the DSU is needed since it must be operating whenever at least one core is in use.