Visible to Intel only — GUID: cnt1678418213839
Ixiasoft
Visible to Intel only — GUID: cnt1678418213839
Ixiasoft
14.6.1. ECC Structure
You calculate the ECC based on a Hamming code for the corresponding data word length.
The following table shows the memory data size and the Hamming code word length for each of the ECC-protected memories in the HPS as well as the memory type. The Hamming code word length is calculated based on the full data width and whether the memory is byte- or word- addressable.
Data Bus Width | ECC Bits |
---|---|
8 to 15 bits | 5 |
16 to 31 bits | 6 |
32 to 63 bits | 7 |
64 to 127 bits | 8 |
128 to 255 bits | 9 |
256 bits | 10 |
The on-chip RAM is word-addressable. It supports sub-word accesses, however, through a read-modify-write operation. For example, accessing byte 2 of an on-chip RAM word causes a data read of the whole word with ECC. If the word passes the syndrome check, then the byte 2 data is concatenated with the other three bytes of the original data. ECC is recalculated and data is written to memory.
Peripheral Memory | Data Size | Memory | ECC Bits | Data Width + ECC Bits | Hamming Code Word (length in bits) | Type 66 |
---|---|---|---|---|---|---|
On-chip RAM | 64 x 65536 | Word-addressable | 8 | 64+8 67 | 72 | Single port |
USB 2.0 OTG RAM | 35 x 8192 | Word-addressable | 7 | 35+7 | 42 | Single port |
USB 3.1 Cache RAM | 64 x 6608 | Word-addressable | 8 | 64+8 | 72 | Simple dual port |
USB 3.1 TX RAM | 64 x 4720 | Word-addressable | 8 | 64+8 | 72 | Simple dual port |
USB 3.1 RX RAM | 64 x 2832 | Word-addressable | 8 | 64+8 | 72 | Simple dual port |
XGMAC TX RAM | 68 x 2048 | Word-addressable | 14 | 68+14 | 82 | Simple dual port |
XGMAC RX RAM | 68 x 2048 | Word-addressable | 14 | 68+14 | 82 | Simple dual port |