Glossary
Related concepts
Active Parallel configuration scheme (AP) Definition
Active Serial configuration scheme (AS) Definition
Adaptive Logic Module (ALM) Definition
Adaptive Look-Up Table (ALUT) Definition
AHDL Include File (.inc) Definition
Altera Applications Technical Support Definition
Altera Hardware Description Language (AHDL) Definition
Altera Megafunction Partner Program (AMPP) Definition
Altera Programming Unit (APU) Definition
Altera website Definition
arithmetic expressions (AHDL) Definition
arithmetic operator Definition
Arria II Device Family Definition
Arria V Device Family Definition
Assignment & Configuration File (.acf) Definition
assignment group Definition
atom Definition
Atom Netlist File (.atm) Definition
Auxiliary Transmit (ATX) PLL Definition
Avalon Interface Definition
Avalon Memory-Mapped Interface Definition
Avalon Streaming Component Specific Signals Definition
Avalon Streaming Interface (Avalon-ST) Definition
Avalon Streaming Sink Interface Definition
Avalon Streaming source port Definition
back-annotation Definition
Backpressure Definition
Backus-Naur Form (BNF) Definition
BGA Definition
BIT0 option Definition
Block Design File (.bdf) Definition
Block Symbol File (.bsf) Definition
Boundary-Scan Description Language File (.bsd) Definition
bypass path Definition
ByteBlaster II Cable Definition
ByteBlasterMV Cable Definition
C4, C8, C16 interconnect Definition
Chain Description File (.cdf) Definition
channel Definition
channel aligner Definition
channel width Definition
clear box feature Definition
Clock Control Block Definition
clock recovery unit (CRU) Definition
clock skew Definition
collection Definition
COM port Definition
Comma-Separated Value File (.csv) Definition
common flash interface (CFI) Definition
component Definition
Component Declaration File (.cmp) Definition
Component Description File (_hw.tcl)
Compressed Vector Waveform File (.cvwf) Definition
configuration device Definition
Configuration Flash Memory (CFM) Definition
configuration memory space Definition
Conversion Setup File (.cof) Definition
Cross-Reference File (.xrf) Definition
Custom Region Definition
cyclic redundancy check (CRC) Definition
Cyclone IV Definition
Cyclone V Device Family Definition
data arrival time Definition
data realigner Definition
data required time Definition
data skew Definition
database Definition
database files Definition
decimal Definition
delay chain Definition
delay-locked loop (DLL) Definition
delimiter Definition
design Definition
design entity Definition
design files Definition
design library Definition
Design Protocol File (.dpf) Definition
design unit Definition
device Definition
device assignment Definition
device family Definition
device migration Definition
device option Definition
differential I/O pin Definition
differential I/O standards Definition
DIP Definition
direct link Definition
DM pin Definition
double data rate (DDR) Definition
DQ I/O Definition
DQS I/O Definition
DSP block Definition
DSP block balancing Definition
dual I/O feedback Definition
dual-purpose pins Definition
dual-range group or bus name Definition
Dual-regional clock Definition
dynamic phase aligner Definition
dynamic phase alignment (DPA) Definition
edge Definition
EDIF Definition
EDIF Input File (.edf) Definition
EEPROM Definition
elaboration Definition
electromigration Definition
embedded cell (EC) Definition
embedded multiplier block
enhanced PLL Definition
entity Definition
EthernetBlaster Cable Definition
EthernetBlaster II Cable Definition
evaluated function Definition
expander product term Definition
fan-in and fan-out
Fast Passive Parallel configuration scheme Definition
fast PLL Definition
Fast Region Definition
file name extension Definition
file types Definition
FineLineBGA, Micro FineLine BGA, and UltraFineLineBGA Definition
FLEX Chain File (.fcf)
floating-point multiplier Definition
fmax Definition
FPGA Xchange-Format File (.fx) Definition
Fractional PLL Definition
Function Prototype Definition
functional simulation Definition
gate primitive Definition
gated clock signal Definition
generic Definition
gigabit transceiver block (GXB) Definition
glitch Definition
global clock Definition
global signal Definition
GND Definition
Graphic Design File (.gdf) Definition
gray code Definition
group Definition
GXB transmitter PLL & GXB receiver PLL Definition
hard logic function Definition
hard_block partition Definition
hexadecimal Definition
Hexadecimal (Intel-Format) File (.hex) Definition
Hexadecimal (Intel-Format) Output File (.hexout) Definition
hierarchical node name Definition
HSPICE Simulation Deck File (.sp) Definition
HTML-Format Report File (.htm) Definition
I/O bank Definition
I/O cell Definition
I/O element Definition
I/O Pin State File Definition (.ips)
I/O standards Definition
IBIS Output File (.ibs) Definition
identifier Definition
In System Configuration File (.isc) Definition
in-circuit reconfigurability (ICR) Definition
In-Socket Programming mode Definition
in-system programmability (ISP) Definition
Input Transition Time timing assignment logic option
insertion point Definition
instance Definition
Instance Naming Rules for Pin Names in the Block Editor Definition
interquad clock Definition
IP Index File (.ipx)
J-lead Definition
Jam Byte Code File (.jbc) Definition
Jam File (.jam) Definition
JTAG boundary-scan testing Definition
JTAG chain Definition
JTAG Debug Information File (.jdi) Definition
JTAG Indirect Configuration File (.jic) Definition
keeper Definition
keyword Definition
Late Clock Latency timing assignment Definition
Library Mapping File (.lmf) Definition
library of parameterized modules (LPM) Definition
license file (license.dat)
local routing Definition
location Definition
Logic Analyzer Interface Definition
Logic Analyzer Interface File (.lai) Definition
Logic Array Block (LAB) Definition
logic cell Definition
logic element Definition
logic function Definition
logic levels Definition
logic primitive Definition
logical operator Definition
LogicLock Region Definition
LUT chain interconnect Definition
M-RAM Definition
M10K memory block Definition
M144K memory block Definition
M20K memory block Definition
M9K memory block Definition
macrocell Definition
macrofunction Definition
mapper Definition
mapper table Definition
Mask Settings File (.msf) Definition
MAX V Definition
MAXII Definition
Mealy state machine Definition
MegaCore functions Definition
megafunction Definition
memory bit Definition
memory element (Verilog HDL) Definition
Memory Initialization File (.mif) Definition
Memory Map File (.map) Definition
memory segment Definition
memory word Definition
metastable state or metastability Definition
migration Definition
migration device Definition
Minimum tco (clock to output delay) Definition
Minimum tpd (pin-to-pin delay) Definition
MLAB Definition
Mnemonic Table Definition
module Definition
Moore state machine Definition
multiclock network Definition
multilevel clock Definition
multiplier block Definition
multiplying operator Definition
multipurpose PLL Definition
MUX Configuration File (.mcf) Definition
mySupport website Definition
n-bit configuration Definition
name characters Definition
nesting Definition
net Definition
node Definition
node name Definition
node type Definition
Number of Source Nodes to Report per Destination Node timing assignment Definition
octal Definition
on-chip termination (OCT) Definition
OpenCore Simulation-Only Evaluation and OpenCore Plus hardware evaluation features Definition
operand Definition
operator Definition
oscillation Definition
other files or project-related files Definition
package Definition
pad Definition
parallel expanders Definition
parallel flash loader (PFL) scheme Definition
parallel port Definition
parameter Definition
parameter (Verilog HDL) Definition
Parameter assignments Definition
parameterized function Definition
parameterized module Definition
part-select Definition
Partial-Mask SRAM Object File (.pmsf) Definition
PartMiner edaXML-Format File (.xml) Definition
Passive Parallel Asynchronous configuration scheme (PPA) Definition
Passive Parallel Synchronous configuration scheme (PPS) Definition
Passive Serial chain Definition
Passive Serial configuration scheme (PS) Definition
pattern detector Definition
PGA Definition
Phase-Locked Loop (PLL) Definition
pin Definition
Pin Planner File (.ppf) Definition
Pin-Out File (.pin) Definition
port Definition
PowerPlay Early Power Estimator file Definition
PQFP Definition
primitive Definition
Procedural Assignment Definition
process Definition
product term Definition
Programmable Interconnect Array (PIA) Definition
Programmable Power Technology Tiles Definition
Programmer Object File (.pof) Definition
programming files Definition
programming hardware Definition
project Definition
propagation delay Definition
Qsys Definition
Qsys System File (.qsys) Definition
quad Definition
quad data rate II (QDRII) SRAM Definition
Quartus Prime Standard Edition Archive File (.qar) Definition
Quartus Prime Standard Edition Archive Log File (.qarlog) Definition
Quartus Prime Standard Edition Exported Partition File (.qxp) Definition
Quartus Prime Standard Edition IP File (.qip) Definition
Quartus Prime Standard Edition Message File (.qmsg)
Quartus Prime Standard Edition Message Flag Rule File (.frf) Definition
Quartus Prime Standard Edition Message Suppression Rule File (.sff) Definition
Quartus Prime Standard Edition Simulation IP File (.sip) Definition
Quartus Prime Standard Edition User-Defined Device File (.qud) Definition
Quartus Prime Standard Edition Default Settings File (.qdf) Definition
Quartus Prime Standard Edition Project File (.qpf) Definition
Quartus Prime Standard Edition Settings File (.qsf) Definition
Quartus Prime Standard Edition Workspace File (.qws) Definition
quiet high definition
quiet low definition
R4, R8, R24 interconnect Definition
race condition Definition
radix Definition
RAM Definition
RAM block Definition
range Definition
rate matcher Definition
Raw Binary File (.rbf) Definition
Raw Programming Data File (.rpd) Definition
receiver channel-to-channel skew (RCCS) Definition
receiver input skew margin (RSKM) Definition
region Definition
regional clock Definition
register Definition
register chain interconnect Definition
Register Duplication and Register Retiming Node Naming Scheme
register packing Definition
register pipelining Definition
regular expressions Definition
relational operator Definition
remote update block Definition
remote/local update difference file Definition
resource assignment Definition
revision description file Definition
ROM Definition
Routing Constraints File (.rcf) Definition
RQFP Definition
rubberbanding Definition
Run All Timing Analyses timing assignment Definition
SameFrame device Definition
sampling window Definition
scalar (Verilog HDL) Definition
secondary input Definition
segmented buffer Definition
sequential group (or bus) name Definition
SERDES Definition
Serial Vector Format File (.svf) Definition
setup relationship Definition
shared expanders and shareable expanders Definition
Signal Activity File (.saf) Definition
signal margin definition
SignalProbe Definition
SignalTap II File (.stp) Definition
SignalTap II Logic Analyzer Definition
simultaneous switching noise (SSN) definition
single data rate (SDR) Definition
slack Definition
SOIC Definition
source-synchronous circuitry Definition
Sources and Probes File (.spf) Definition
SRAM Object File (.sof) Definition
Stamp model files Definition
Standard Delay Format Output File (.sdo) Definition
state Definition
state bit Definition
state machine Definition
State Machine File (.smf) Definition
state name Definition
state transition Definition
stderr Definition
stdout Definition
Stratix IV Definition
Stratix V Definition
subdesign Definition
Support Center
Symbol Definition
Symbol File (.sym) Definition
symbol name Definition
symbolic name Definition
synchronizer Definition
Synopsys Design Constraints File (.sdc) Definition
synthesized logic cells Definition
SystemVerilog Design File (.sv) Definition
SystemVerilog Output File (.svo)
Tab-Separated Value File (.txt) Definition
Tabular Text File (.ttf) Definition
TalkBack Definition
TalkForward Definition
target Definition
tch (minimum clock high time) Definition
tcl (minimum clock low time) Definition
Tcl Script File (.tcl) Definition
tco (clock to output delay) Definition
ternary operator Definition
test bench file Definition
Text Design File (.tdf) Definition
Text Design Output File (.tdo) Definition
Text-Format Report File (.rpt) Definition
th (clock hold time) Definition
time unit Definition
time unit interval (TUI) Definition
timing requirements and constraints Definition
title block Definition
title block section Definition
Token File (ted.tok) Definition
top-level design entity Definition
tpd (pin-to-pin delay) Definition
TQFP Definition
transmitter channel-to-channel skew (TCCS) Definition
trigger Definition
trigger position Definition
tsu (clock setup time)
type (VHDL) Definition
tzx (Clock-to-low-impedance time) Definition
UFM Definition
USB-Blaster Cable Definition
Value Change Dump File (.vcd) Definition
variable Definition
VCC Definition
vector (Verilog HDL) Definition
vector source files Definition
Vector Table Output File (.tbl) Definition
Vector Waveform File (.vwf) Definition
vectors (simulation) Definition
Verilog Design File (.v) Definition
Verilog HDL Definition
Verilog Output File (.vo) Definition
Verilog Quartus Mapping File (.vqm) Definition
Verilog Test Bench File (.vt) Definition
version-compatible database files Definition
VHDL Definition
VHDL Design File (.vhd) Definition
VHDL Output File (.vho) Definition
VHDL Test Bench File (.vht) Definition
VIHmin (DC) definition
VILmax (DC) definition
virtual pins Definition
VITAL (VHDL Initiative Toward ASIC Libraries) Definition
VREF group Definition
waveform files Definition
Waveform Settings File (.wsf) Definition
wildcard characters Definition
wire loop Definition
word aligner Definition
WYSIWYG primitive Definition
XGMII state machine Definition
XML files Definition
8B/10B encoder/decoder Definition