A configuration scheme in which the active serial memory interface block loads design data into one or more Cyclone, or Stratix devices. In this scheme, the active serial memory interface block controls the configuration process, and configures all of the devices in the chain using the configuration data stored in an EPCS1, EPCS4, EPCS16, or EPCS64 serial configuration device.
The Quartus® Prime Standard Edition Compiler automatically generates SRAM Object Files (.sof) that contain the data for configuring Altera devices in an active serial configuration scheme.