An Altera device family that is as a cost-effective solution for data path applications. The Cyclone IV device family includes Cyclone IV E and Cyclone IV GX devices. The Cyclone IV device architecture supports M9K memory blocks to implement single-port, dual-port, and true dual-port memory, and high-speed interfaces to external memory devices such as single data rate (SDR) SDRAM, double data rate (DDR) SDRAM, double data rate II (DDR-II) SDRAM and quad data rate II (QDR-II) SRAM. Cyclone IV devices also contain embedded multiplier blocks that enable efficient implementation of high-performance filters and multipliers.
Cyclone IV GX devices have dedicated gigabit transceiver block (GXB) circuitry that includes up to 16 high-speed transceiver channels, each incorporating clock data recovery (CDR) technology and embedded SERDES capability at data rates up to 3.125 Gbps. Cyclone IV GX devices offer dedicated hard IP for PCI Express (PIPE) (PCIe) Gen 1.
Cyclone IV E devices are available with core voltages of 1.0 V and 1.2 V.
Cyclone IV devices provide up to eight PLLs per device, which provide advanced multiplication, programmable duty cycle, phase shifting, programmable bandwidth, manual clock switchover, clock outputs driving all networks, and normal and zero delay buffer modes. Cyclone IV devices also provide up to 20 global clock lines that drive the global clock network throughout the entire device.
Cyclone IV devices support numerous single-ended and differential I/O standards.
The memory blocks of a Cyclone IV device can implement shift registers and various types of memory with or without parity bits, including dual-port, true dual-port RAM, and single-port RAM; ROM; FIFO buffers; and shift registers.
You can use device migration to transfer a design between Cyclone IV devices with equivalent pin-outs, while maintaining the same board layout and pin assignments.