The DM pin in Cyclone series devices is the data mask signal for a write operation to a double data rate (DDR) SDRAM memory. The SDRAM masks data for each 8 bits of data (DQ[7..0]) based on the level of the corresponding DM pin. The DM pin is sampled on both edges of the DQS strobe in exactly the same way as for DQ I/O pins during a write operation. A DM pin must be low for the corresponding data byte to be written.
Although DM pins are output-only, DM pin loading is designed to match that of DQS and DQ I/O pins. Like the DQS and DQ I/O pins in Cyclone device, DM pins are recommended placements only. There is nothing special about these pins or the programmable logic device (PLD) circuitry that is available for connecting to them, other than their position relative to other DQS and DQ I/O pins, power pins, and VREF pins.