A basic functional block used in Verilog HDL. The following are gate primitives that are supported in the Quartus® Prime Standard Edition software:
Gate primitives are similar to the WIRE, AND, NAND, NOR, NOT, OR, XNOR, and XOR primitives in Block Design Files (.bdf).
For information about Quartus® Prime Standard Edition support for gate primitives, go to Gates & Switches.