Intel® Stratix® 10 Hard Processor System Technical Reference Manual

ID 683222
Date 11/28/2022
Public

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19.4.9. Clocks and Resets

The SPI controller uses the clock and reset signals shown in the following table.

Table 201.  SPI Controller Clocks and Resets
 

Master

Slave

SPI clock

l4_main_clk l4_main_clk

SPI bit-rate clock

sclk_out sclk_in

Reset

spim_rst_n spis_rst_n