Intel® Stratix® 10 Hard Processor System Technical Reference Manual

ID 683222
Date 11/28/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

16.5.1.1. Avoiding Glitches in the Card Clock Outputs†

To avoid glitches in the card clock outputs (sdmmc_cclk_out), the software should use the following steps when changing the card clock frequency:

  1. Before disabling the clocks, ensure that the card is not busy due to any previous data command. To determine this, check for 0 in bit 9 of the STATUS register.
  2. Update the Clock Enable register to disable all clocks. To ensure completion of any previous command before this update, send a command to the CIU to update the clock registers by setting:
    • start_cmd bit
    • "update clock registers only" bits
    • "wait_previous data complete"
      Note: Wait for the CIU to take the command by polling for 0 on the start_cmd bit.
  3. Set the start_cmd bit to update the Clock Divider, Clock Source registers, or both and send a command to the CIU in order to update the clock registers. Wait for the CIU to take the command.
  4. Set start_cmd to update the Clock Enable register in order to enable the required clocks and send a command to the CIU to update the clock registers. Wait for the CIU to take the command.