Intel® Stratix® 10 Hard Processor System Technical Reference Manual

ID 683222
Date 11/28/2022
Public

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11.2.1. Boot Clock

The Boot Clock (boot_clk) is used as the default clock for both cold or warm reset (Boot Mode), the Hardware Sequencer local clock and the external bypass clock reference.

The boot_clk is generated from the secure cb_intosc_div2_clk or the unsecure external oscillator. The boot_clk source is only updated coming out of cold reset or a warm reset (boot mode request) and is not changed at any other time. For normal operation, Intel recommends to use external oscillator as the internal oscillator is high variable and has slow speed.

All clocks are bypassed to boot clock while coming out of reset. Intel® Quartus® Prime may configure and lock the PLLs in boot mode. On exiting boot mode, all the clocks are gracefully transitioned to functional clocks.

The MPU and NOC (includes debug clocks) blocks contain enable outputs to define clock frequency ratios to the MPU, NOC and CoreSight logic.

The CSR Register logic uses an independent clock, l4_sys_free_clk, to allow the clock to be changed by software.