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1. Overview
2. Install and License the GTS Ethernet Intel® FPGA Hard IP
3. Configure and Generate Ethernet Hard IP variant
4. Integrate GTS Ethernet Intel® FPGA Hard IP into Your Application
5. Simulate, Compile, and Validate (MAC+PCS) - Single Instance
6. Simulate, Compile, and Validate (MII PCS Only /PCS66 OTN/PCS66 FlexE) - Single Instance
7. Simulate, Compile, and Validate SyncE - Single Instance
8. Simulate and Compile PTP1588 - Single Instance
9. Simulate, Compile, and Validate - Multiple Instance
10. Simulate, Compile, and Validate - Auto-Negotiation and Link Training
11. Troubleshoot and Diagnose Issues
A. Appendix A: Functional Description
B. Appendix B: Configuration Registers
C. Appendix C: Document Revision History for the GTS Ethernet Intel® FPGA Hard IP User Guide
4.1. Implement Required Clocking
4.2. Implement Required Resets
4.3. Connect the Status Interface
4.4. Connect the MAC Avalon Streaming Client Interface
4.5. Connect the MII PCS Only Client Interface
4.6. Connect the PCS66 Client Interface – FlexE and OTN
4.7. Connect the Precision Time Protocol Interface
4.8. Connect the Ethernet Hard IP Reconfiguration Interface
4.9. Connect the Auto-Negotiation and Link Training
4.1.1. Implement MAC Synchronous Clock Connections to Single Instance
4.1.2. Implement MAC Synchronous Clock Connections to Multiple Instances
4.1.3. Implement Clock Connections to MAC Asynchronous Operation
4.1.4. Implement Clock Connections in Synchronous Ethernet Operation (Sync-E)
4.1.5. Implement Clock Connections in PTP-Based Design
4.4.1.1. Drive the Ethernet Packet to the TX MAC Avalon Streaming Client Interface with Disabled Preamble Passthrough
4.4.1.2. Drive the Ethernet Packet on the TX MAC Avalon Streaming Client Interface with Enabled Preamble Passthrough
4.4.1.3. Use i_tx_skip_crc to Control Source Address, PAD, and CRC Insertion
4.4.1.4. Assert the i_tx_error to Invalidate a Packet
4.4.2.1. Receive Ethernet Frame on the RX MAC Avalon Streaming Client Interface with Preamble Passthrough Disabled
4.4.2.2. Receive Ethernet Frame with Preamble Passthrough Enabled
4.4.2.3. Receive Ethernet Frame with Remove CRC bytes Disabled
4.4.2.4. Monitor Status and Errors on the RX MAC Avalon Streaming Client Interface
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A.4.2. PTP User Flow
You must implement proper TX and RX data flows prior to sending PTP commands to the IP core and utilizing the timestamps.
Attention: The following flows depict pseudo-code meant for conceptual, illustrative purposes. For definitive software routines, consult the design example.
The figures below depict the TX and RX client flows described in the PTP TX Client Flow and PTP RX Client Flow sections.
Figure 85. PTP TX Client Flow
The figure displays the following events in PTP TX client flow. For more information, refer to PTP TX User Flow.
- A: Reading TX raw offset data from IP
- B: Calculating the TX offset value
- C: Writing calculated TX offset value to the IP
Figure 86. PTP RX with RS-FEC Client Flow
The figure displays the following events in PTP RX with RS-FEC client flow. For more information, refer to PTP RX User Flow.
- D: Reading RS-FEC cw_pos value from the IP
- E: Calculating cw_pos adjustment value
- F: Writing adjustment value to the IP
- G: Reading RX raw offset data from IP
- H: Calculating the RX offset value
- I: Writing calculated RX offset value to the IP
Figure 87. PTP RX without RS-FEC Client Flow
The figure displays the following events in PTP RX with no RS-FEC client flow. For more information, refer to PTP RX User Flow.
- G: Reading RX raw offset data from IP
- H: Calculating the RX offset value
- I: Writing calculated RX offset value to the IP