Hard Processor System Technical Reference Manual: Agilex™ 5 SoCs

ID 814346
Date 4/01/2024
Public
Document Table of Contents

10.6. Lightweight FPGA Slaves Address Space

The HPS masters using the lightweight HPS-to-FPGA (LWH2F) bridge can access lightweight FPGA slaves in the MPU address region and L3 and L4 address regions. Refer to the MPU address space and L3 and L4 address space sections for the details.