AXI Streaming Intel® FPGA IP for PCI Express* User Guide

ID 790711
Date 7/08/2024
Public
Document Table of Contents

3.9. Build the Application for the AXI Streaming Intel® FPGA IP for PCI Express* IP Variant

After configuring the software drivers for the AXI Streaming Intel® FPGA IP for PCI Express* IP variant, you must configure the PCIe* link to run applications for traffic tests, Read/Write transactions, measure performance etc.

Table 20.  Application for the AXI Streaming Intel® FPGA IP for PCI Express*
AXI Streaming Intel® FPGA IP for PCI Express* in Description
Standalone mode You must create your own software application based on the application requirement.
Design example Example application for the IP is generated as part of the design example generation.

Refer to the following section for instructions on how to run the application for the Quartus generated design examples.

Intel OFS reference design Example application for the IP and example workloads are provided as part of the reference design.
Note: For examples on application and workloads of the AXI Streaming Intel® FPGA IP for PCI Express* , please contact your Intel Sales Representative for access to the Intel OFS design repository.
Note: OFS lags behind Quartus® Prime Pro Edition by a cycle, so it does not support the 24.2 version of the AXI Streaming Intel® FPGA IP for PCI Express* in the Quartus® Prime Pro Edition 24.2 release.