Visible to Intel only — GUID: mao1698164114817
Ixiasoft
Visible to Intel only — GUID: mao1698164114817
Ixiasoft
3.6. Simulate the AXI Streaming Intel® FPGA IP for PCI Express* IP Variant
AXI Streaming Intel® FPGA IP for PCI Express* in | Description |
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Standalone mode | You must create your own simulation environment to simulate and verify the functionality of the IP and design, based on the application requirement. You can also use third-party Bus Functional Models (BFMs), and Verification IPs (VIPs) to verify the IP in simulation. The IP simulation files can be found in the /ip/sim/<simulator> folder in the Quartus® Prime project directory. |
Design example | The simulation testbench (Intel BFM) for the IP is generated as part of the design example generation. Refer to the steps below for simulating the design example using the Intel BFM. |
Intel Open FPGA Stack (OFS) reference design | Simulation environment for the IP and example workloads are provided as part of the reference design.
Note: For examples on simulating the IP with the Intel OFS reference design, contact your Intel Sales Representative for access to the Intel OFS design repository.
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