AXI Streaming Intel® FPGA IP for PCI Express* User Guide

ID 790711
Date 7/08/2024
Public
Document Table of Contents

B.1.2. Test Driver Module

The test driver module, intel_rtile_pcie_tbed_hwtcl.v, instantiates the top-level BFM,altpcietb_bfm_top_rp.v.

The top-level BFM completes the following tasks:

  1. Instantiates the driver and monitor.
  2. Instantiates the Root Port BFM.
  3. Instantiates the serial interface.

The configuration module, altpcietb_g3bfm_configure.v, performs the following tasks:

  1. Configures and assigns the BARs.
  2. Configures the Root Port and Endpoint.
  3. Displays comprehensive Configuration Space, BAR, MSI, MSI-X, and AER settings.