AXI Streaming Intel® FPGA IP for PCI Express* User Guide

ID 790711
Date 7/08/2024
Public
Document Table of Contents

7.3.1.14. D-STATE STS

The application layer can use this register to obtain the D-State values of each function. It should write appropriate values to the PF Number, VF Number, VF Active and Slot Number fields first before issuing a read to obtain the D-State value of the corresponding function.

Default Value: 0x0000_0000

Register Name Bit Attribute User Side Description
D-STATE STS 4-0 RW

PF Number

Indicates Physical Function Number of Interrupt

Note: Current Quartus release limits to max 8 PFs only.
5 RsvdZ Reserved
16-6 RW

VF Number

Indicates Virtual Function Number of Interrupt.

17 RsvdZ Reserved
18 RW

VF Active

Indicates Virtual Function is generating Interrupt.

23-19 RW

Slot Number

Indicates Slot Number of function generating Interrupt.

27-24 RsvdZ Reserved
31-28 RO

D-State Value

Power Management D-State for each function per PF, VF, VF Active and Slot Number settings above.

0000: Uninitialized or Invalid

0001: D0

0010: D1

0100: D2

1000: D3