Visible to Intel only — GUID: giq1700067277114
Ixiasoft
Visible to Intel only — GUID: giq1700067277114
Ixiasoft
6.4.1. Configuration Extension Bus Request Interface (st_cebreq)
The IP sends configuration read and configuration write requests using this interface. The interface follows AXI Streaming interface protocol with ready valid handshake. The interface will support a maximum of one outstanding read request.
This interface is mutually exclusive with the Configuration Intercept Request Interface.
Signal Name | Direction | Clock Domain | Description |
---|---|---|---|
ss_app_st_cebreq_tvalid | Output | axi_lite_clk | When asserted, indicates a valid Configuration Extension access cycle. Deasserted when app_ss_st_cebreq_tready is asserted. |
app_ss_st_cebreq_tready | Input | axi_lite_clk | Application asserts this signal for one clock to acknowledge ss_app_st_cebreq_tvalid is seen by responder. |
ss_app_st_cebreq_tdata[9:0] | Output | axi_lite_clk | DWORD Address of register being accessed. |
ss_app_st_cebreq_tdata[14:10] | Output | axi_lite_clk | The slot Number of register access. |
ss_app_st_cebreq_tdata[17:15] | Output | axi_lite_clk | The PF Number of register access [2:0]. |
ss_app_st_cebreq_tdata[28:18] | Output | axi_lite_clk | Indicates child VF Number of parent PF indicated by ss_app_st_cebreq_tdata[17:15]. |
ss_app_st_cebreq_tdata[29] | Output | axi_lite_clk | Indicates access is for Virtual Function implemented in slot's physical function. |
ss_app_st_cebreq_tdata[61:30] | Output | axi_lite_clk | Write data for write access. |
ss_app_st_cebreq_tdata[67:62] [67:66] = pf_num[4:3] |
Output | axi_lite_clk | Indicates the configuration register access type, read or write. For writes, indicates the byte enables: The following encodings are defined: 4'b0000: Read 4'b0001: Write byte 0 4'b0010: Write byte 1 4'b0100: Write byte 2 4'b1000: Write byte 3 4'b1111: Write all bytes. Combinations of byte enables, for example,4'b 0101b are also valid. |
The following figure shows timing diagram for write command; the first command sends write for all four bytes of register located at address=4. The ss_app_st_cebreq_tdata[29] low indicates the access is for a physical function.
The second command sends write for byte3 and byte2 of register located at address =8. The ss_app_st_cebreq_tdata[29] high indicates access is for a virtual function.