AXI Streaming Intel® FPGA IP for PCI Express* User Guide

ID 790711
Date 7/08/2024
Public
Document Table of Contents

3.10. Verification with the AXI Streaming Intel® FPGA IP for PCI Express* IP Variant

After simulation, compilation, configuring software drivers, and building application for the AXI Streaming Intel® FPGA IP for PCI Express* IP Variant, you must verify the IP.

Table 22.  Verification with the AXI Streaming Intel® FPGA IP for PCI Express*
AXI Streaming Intel® FPGA IP for PCI Express* in Description
Standalone mode You must create your own verification test suite based on the application requirement.
Design example Example testbench for the IP are generated as part of the design example generation.

Refer to Simulate the AXI Streaming Intel® FPGA IP for PCI Express* for details on the verification testbench provided as part of the Quartus generated design examples.

Intel OFS reference design

Example verification suite for the IP and example workloads are provided as part of the reference design.

Note: For examples on verification suite of the AXI Streaming Intel® FPGA IP for PCI Express* , contact your Intel Sales Representative for access to the Intel OFS design repository.
Note: OFS lags behind Quartus® Prime Pro Edition by a cycle, so it does not support the 24.2 version of the AXI Streaming Intel® FPGA IP for PCI Express* in the Quartus® Prime Pro Edition 24.2 release.