Intel® Quartus® Prime Pro Edition User Guide: Platform Designer

ID 683609
Date 10/04/2021
Public

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6.10. Avalon® Streaming Multiplexer and Demultiplexer Intel® FPGA IP

The Avalon® Streaming Multiplexer Intel® FPGA IP receives data from various input interfaces and multiplexes the data into a single output interface, using the optional channel signal to indicate the origin of the data. The Avalon® Streaming Multiplexer Intel® FPGA IP receives data from a channelized input interface and drives that data to multiple output interfaces, where the output interface is selected by the input channel signal.

The Multiplexer and Demultiplexer IPs can transfer data between interfaces on that supports a unidirectional flow of data. The Multiplexer and Demultiplexer IP allow you to create multiplexed or demultiplexed datapaths without having to write custom HDL code. The Multiplexer IP includes an Avalon® Streaming Round Robin Scheduler.