Visible to Intel only — GUID: mwh1409958819565
Ixiasoft
Visible to Intel only — GUID: mwh1409958819565
Ixiasoft
3.9. Create a Composed Component or Subsystem
A composed component is a subsystem containing instances of other components. Unlike an HDL-based component, a composed component's HDL is created by generating HDL for the components in the subsystem, in addition to the Platform Designer interconnect to connect the subsystem instances.
You can add child instances in a composition callback of the _hw.tcl file.
With a composition callback, you can also instantiate and parameterize sub-components as a function of the composed component’s parameter values. You define a composition callback by setting the COMPOSITION_CALLBACK module property to the name of the composition callback procedures.
A composition callback replaces the validation and elaboration phases. HDL for the subsystem is generated by generating all of the sub-components and the top-level that combines them.
To connect instances of your component, you must define the component's interfaces. Unlike an HDL-based component, a composed component does not directly specify the signals that are exported. Instead, interfaces of submodules are chosen as the external interface, and each internal interface's ports are connected through the exported interface.
Exporting an interface means that you are making the interface visible from the outside of your component, instead of connecting it internally. You can set the EXPORT_OF property of the externally visible interface from the main program or the composition callback, to indicate that it is an exported view of the submodule's interface.
Exporting an interface is different than defining an interface. An exported interface is an exact copy of the subcomponent’s interface, and you are not allowed to change properties on the exported interface. For example, if the internal interface is a 32-bit or 64-bit host without bursting, then the exported interface is the same. An interface on a subcomponent cannot be exported and also connected within the subsystem.
When you create an exported interface, the properties of the exported interface are copied from the subcomponent’s interface without modification. Ports are copied from the subcomponent’s interface with only one modification; the names of the exported ports on the composed component are chosen to ensure that they are unique.
Composed _hw.tcl File that Instantiates Two Sub-Components
Platform Designer connects the components, and also connects the clocks and resets. Note that clock and reset bridge components are required to allow both sub-components to see common clock and reset inputs.
package require -exact qsys 14.0
set_module_property name my_component
set_module_property COMPOSITION_CALLBACK composed_component
proc composed_component {} {
add_instance clk altera_clock_bridge
add_instance reset altera_reset_bridge
add_instance regs my_regs_microcore
add_instance phy my_phy_microcore
add_interface clk clock end
add_interface reset reset end
add_interface slave avalon slave
add_interface pins conduit end
set_interface_property clk EXPORT_OF clk.in_clk
set_instance_property_value reset synchronous_edges deassert
set_interface_property reset EXPORT_OF reset.in_reset
set_interface_property slave EXPORT_OF regs.slave
set_interface_property pins EXPORT_OF phy.pins
add_connection clk.out_clk reset.clk
add_connection clk.out_clk regs.clk
add_connection clk.out_clk phy.clk
add_connection reset.out_reset regs.reset
add_connection reset.out_reset phy.clk_reset
add_connection regs.output phy.input
add_connection phy.output regs.input
}