Intel® Quartus® Prime Pro Edition User Guide: Platform Designer

ID 683609
Date 10/04/2021
Public

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7.13.24. Port Properties

Name Type Description
String DIRECTION Specifies the direction of the signal
String NAME Renames a top-level port. Only use with set_interface_port_property
String ROLE Specifies the type of the signal. Each interface type defines a set of interface types for its ports.
String VHDL_TYPE Specifies the VHDL type of the signal. Can be either STANDARD_LOGIC, or STANDARD_LOGIC_VECTOR.
Integer WIDTH Specifies the width of the signal in bits.