GTS Transceiver PHY User Guide

ID 817660
Date 7/08/2024
Public
Document Table of Contents

2.2.4. General Design Requirement

In a design with GTS transceivers, for proper transceiver calibration, you must provide a 25 MHz, 100 MHz or 125 MHz free running external clock source to the OSC_CLK_1 pin and configure it in the Quartus® Prime Pro Edition software. Refer to the Device Configuration User Guide: Agilex™ 5 FPGAs and SoCs for instructions on how to set the OSC_CLK_1 pin.