Visible to Intel only — GUID: ylb1681429201449
Ixiasoft
Visible to Intel only — GUID: ylb1681429201449
Ixiasoft
3.1.2. FEC Direct Supported Modes
The GTS PMA/FEC Direct PHY Intel FPGA IP supports the following for FEC Direct modes:
- IEEE 802.3 BASE-R Firecode (2112, 2080) (CL 74)
- IEEE 802.3 RS (528, 514) (CL 91)
- IEEE 802.3 RS (528, 514) (CL 91) ETC
- Fibre Channel RS (528,514)
- OTU25u RS (528,514)
- Supports only the System PLL clocking mode
- Supports only the duplex operation mode 26
- Only 4x10GE-1 FEC is supported and every lane is treated independently
- All FEC modes support 1G to GTS transceiver maximum supported data rate
You can enable the FEC Direct mode in the IP parameter editor by turning on the Enable FEC option. The FEC Direct modes with FEC specifications are topology dependent to achieve different BER. FEC data to and from the PCS is 33 bits. On the PMA interface side, FEC data from and to the PMA interface is 33 bits wide for Firecode FEC and 40 bits for RS-FEC. For designs that include FEC, the gearbox enables automatically. The gearbox option for Firecode FEC is 32:33 and 32:40 for RS-FEC.
Clocking Mode | FEC Mode | Double Width/ Single Width 27 | PMA Interface Width | PMA Interface FIFO (TX/RX) | Core Interface FIFO (TX/RX) |
---|---|---|---|---|---|
System PLL Clocking |
Firecode FEC (2112, 2080) CL74 | DW | 32 | Elastic/Elastic | Phase Compensation/Phase Compensation |
RS-FEC (528, 514) CL91 | DW | 32 | Elastic/Elastic | Phase Compensation/Phase Compensation | |
RS-FEC (528, 514) CL91 ETC | DW | 32 | Elastic/Elastic | Phase Compensation/Phase Compensation | |
Fibre Channel RS (528, 514) | DW | 32 | Elastic/Elastic | Phase Compensation/Phase Compensation | |
OTU25u RS (528, 514) | DW | 32 | Elastic/Elastic | Phase Compensation/Phase Compensation |