GTS Transceiver PHY User Guide

ID 817660
Date 7/08/2024
Public
Document Table of Contents

2.3.2.2. Deserializer

The deserializer clocks in serial input data from the receiver buffer using the high speed serial recovered clock, and deserializes the data using the low-speed parallel recovered clock. The deserializer forwards the deserialized data to the receiver PCS, FEC, PCIe HIP, USB HIP or FPGA core. The deserializer supports the following deserialization factors: 8, 10, 16, 20, 32.
Figure 18. Deserializer